An Yield Model for Electronics Assembly

Author(s):  
N. Gnanasambandam ◽  
M. Munikrishnan ◽  
V. Poyyapakkam ◽  
P. Borgesen ◽  
K. Srihari

Managing assembly yield in the Printed Circuit Board (PCB) assembly process is crucial in reducing the overall manufacturing cost of a product. Being faced with electronic components that have high interconnect (pin or solder bump) count, density, and complexity, it is extremely important to streamline the manufacturing losses arising from misplaced or poorly assembled components. In order to achieve this goal, yield models are utilized to anticipate and evaluate problems and their causes. This activity could be potentially implemented at the design stage or at least much before the product reaches the manufacturing floor. This research examines some important factors that affect area array (BGA, CSP, flip chip) assembly yields, taking a two-pronged approach to modeling. Achievable yield is classified into placement and assembly components and is estimated using a simulation model.

Author(s):  
Mu-Chun Wang ◽  
Zhen-Ying Hsieh ◽  
Ting-Yu Yang ◽  
Chia-Hao Tu ◽  
Shuang-Yuan Chen

The semiconductor process technology and the circuit design concept are continuously improved at the recent era. The product cost is gradually decreased, too. The commercial electronic products generally cover ICs, external components and printed circuit board (PCB). After the circuit layout blueprints are completed, engineers will transfer them into PCB as a prototype. The next step is to integrate some contributed electronic components to form a functional product. This second step is called as PCB assembly (PCBA). However, the bigger copper area on PCB will provide a good thermal dissipation. This effect will degrade the solderability and increase the contact resistance while the electronic components are integrated on PCB. The product performance, therefore, is deteriorated. Contriving some special empty boundary shapes neighboring the connected pins of integrated electronic components to soften the thermal dissipation ability of copper layer on printed circuit substrate is a good method. We design some useful patterns to conquer this issue and increase the PCB assembly yield from 70% to 95%. The other efforts are to study the flow rate of isolated ink in PCBA production line and suitably control the solder temperature. Because some electronic components are composed by plastic materials, higher temperature will damage the external shapes of them and the PCB has the bending possibility. These two beneficial efforts also contribute the assembly yield well in 2.4GHz radio-frequency (RF) products.


2002 ◽  
Vol 124 (3) ◽  
pp. 205-211 ◽  
Author(s):  
John H. Lau ◽  
S. W. Ricky Lee ◽  
Stephen H. Pan ◽  
Chris Chang

An elasto-plastic-creep analysis of a low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip in a chip scale package (CSP) format which is soldered onto a printed circuit board (PCB) is presented in this study. Emphasis is placed on the design, materials, and reliability of the micro VIP substrate and of the micro VIP CSP solder joints on PCB. The solder is assumed to obey Norton’s creep law. Cross-sections of samples are examined for a better understanding of the solder bump, CSP substrate redistribution, micro VIP, and solder joint. Also, the thermal cycling test results of the micro VIP CSP PCB assembly is presented.


Author(s):  
Guo Xiaochuan

For design of automotive airbag electronic control units (AB ECU), it is essential to have a validated and reliable finite element (FE) simulation model in place in order to allow already in an early design stage for the accurate prediction of the ECU’s structural vibration behavior. A “bottom-up” approach which described in the ASME guide for verification and validation (ASME V&V 10-2006) is applied for the validation of the AB ECU simulation model. The AB ECU is decomposed into different assembly level. Single printed circuit board (PCB) is the lowest elementary component level. In the PCB level simulation and validation, the influence of in-plane pre-stress on PCB’s transverse vibration characteristic has been encountered, but it has been found out that the source of the in-plane pre-stress can not be explained by classical beam/plate theory. Analysis and simulation for PCB fixation reveals that the fundamental source of the in-plane pre-stress is structure’s geometric nonlinearity.


2014 ◽  
Vol 874 ◽  
pp. 139-143 ◽  
Author(s):  
Jacek Pietraszek ◽  
Aneta Gądek-Moszczak ◽  
Tomasz Toruński

PartnerTech provides printed circuit board (PCB) assembly on request. Wired elements are assembled in through-hole technology and soldered on the wave soldering machine. The PCB with inserted elements is passed across the pumped wave of melted solder. Typically this process is accompanied by some class of defects like cracks, cavities, wrong solder thickness and poor conductor. In PartnerTech Ltd. another type of defects was observed: dispersion of small droplets of solder around holes. Quality assurance department plans to optimize the process in order to reduce the number of defects. In the first stage, it was necessary to develop a methodology for counting defects. This paper presents experimental design and analysis related to this project.


Manufacturing ◽  
2002 ◽  
Author(s):  
J. Cecil ◽  
A. Kanchanapiboon

This paper presents a framework for supporting virtual prototyping related activities in the domain of printed circuit board (PCB) assembly. The focus of discussion is restricted to Surface Mount Technology (SMT) based processes only. In general, Virtual Prototyping enables the conceptualization, evaluation and validation of proposed ideas, plans and solutions. Using a virtual prototyping framework, cross functional evaluation and analysis can be facilitated where designers, manufacturing engineers, testing and other life-cycle team members can communicate effectively as well as identify and eliminate problems, which may arise later in the downstream manufacturing and testing activities.


2021 ◽  
Author(s):  
Jiheong Kang ◽  
Wonbeom Lee ◽  
Hyunjun Kim ◽  
Inho Kang ◽  
Hongjun Park ◽  
...  

Abstract Stretchable electronics are considered next-generation electronic devices in a broad range of emerging fields, including soft robotics1,2, biomedical devices3,4, human-machine interfaces5,6, and virtual or augmented reality devices7,8. A stretchable printed circuit board (S-PCB) is a basic conductive framework for the facile assembly of system-level stretchable electronics with various electronic components. Since an S-PCB is responsible for electrical communications between numerous electronic components, the conductive lines in S-PCB should strictly satisfy the following features: (i) metallic conductivity, (ii) constant electrical resistance during dynamic stretching, and (iii) tough interface bonding with various components9. Despite recent significant advances in intrinsically stretchable conductors10,11,12, they cannot simultaneously satisfy the above stringent requirements. Here, we present a new concept of conductive liquid network-based elastic conductors. These conductors are based on unprecedented liquid metal particles assembled network (LMPNet) and an elastomer. The unique assembled network structure and reconfigurable nature of the LMPNet conductor enabled high conductivity, high stretchability, tough adhesion, and imperceptible resistance changes under large strains, which enabled the first elastic-PCB (E-PCB) technology. We synthesized LMPNet through an acoustic field-driven cavitation event in the solid state. When an acoustic field is applied, liquid metal nanoparticles (LMPnano) are remarkably generated from original LMPs and assemble into a highly conductive particle network (LMPNet). Finally, we demonstrated a multi-layered E-PCB, in which various electronic components were integrated with tough adhesion to form a highly stretchable health monitoring system. Since our synthesis of LMPNet is universal, we could synthesize LMPNet in various polymers, including hydrogel, self-healing elastomer and photoresist and add new functions to LMPNet.


1996 ◽  
Vol 118 (2) ◽  
pp. 101-104 ◽  
Author(s):  
John Lau ◽  
Eric Schneider ◽  
Tom Baker

The reliability of solder bumped flip chips on organic coated copper (OCC) printed circuit board (PCB) has been studied by shock and vibration tests and a mathematical analysis. Two different chip sizes (7 mm and 14 mm on a side) have been studied, and the larger chips have many internal solder bumps. For the in-plane and out-of-plane and out-of-plane shock tests, the chips were assembled with and without underfill encapsulants. However, for the out-of-plane vibration tests all the chips were underfilled with epoxy.


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