Ceramic Via Wafer-Level Packaging for MEMS

2005 ◽  
Author(s):  
John M. Heck ◽  
Leonel R. Arana ◽  
Bill Read ◽  
Thomas S. Dory
Keyword(s):  
Mems Devices ◽  
Wafer Level ◽  
Micro Electro Mechanical Systems ◽  
Mems Switches ◽  
Mems Packaging ◽  
Wafer Level Packaging ◽  
Novel Approach ◽  
Electrical Interconnection ◽  
Tin Silver Copper ◽  
Board Level

We will present a novel approach to wafer level packaging for micro-electro-mechanical systems. Like most common MEMS packaging methods today, our approach utilizes a wafer bonding process between a cap wafer and a MEMS device wafer. However, unlike the common methods that use a silicon or glass cap wafer, our approach uses a ceramic wafer with built-in metal-filled vias, that has the same size and shape as a standard 150 mm silicon wafer. This ceramic via wafer packaging method is much less complex than existing methods, since it provides hermetic encapsulation and electrical interconnection of the MEMS devices, as well as a solderable interface on the outside of the package for board-level interconnection. We have demonstrated successful ceramic via wafer-level packaging of MEMS switches using eutectic gold-tin solder as well as tin-silver-copper solder combined with gold thermo-compression bonding. In this paper, we will present the ceramic via MEMS package architecture and discuss the associated bonding and assembly processes.

Wafer Level Micropackaging of MEMS Devices Using Thin Film Anodic Bonding

2002 ◽  
Vol 729 ◽  
Author(s):  
Lauren E. S. Rohwer ◽  
Andrew D. Oliver ◽  
Melissa V. Collins
Keyword(s):  
Shear Strength ◽  
Test Sample ◽  
Anodic Bonding ◽  
Mems Devices ◽  
Wafer Level ◽  
Thermal Actuators ◽  
Wafer Level Packaging ◽  
Hermetic Seal ◽  
Leak Testing ◽  
Before And After

AbstractA wafer level packaging technique that involves anodic bonding of Pyrex wafers to released surface micromachined wafers is demonstrated. Besides providing a hermetic seal, this technique allows full wafer release, provides protection during die separation, and offers the possibility of integration with optoelectronic devices. Anodic bonding was performed under applied voltages up to 1000 V, and temperatures ranging from 280 to 400°C under vacuum (10-4Torr). The quality of the bonded interfaces was evaluated using shear strength testing and leak testing. The shear strength of Pyrex-to-polysilicon and aluminum bonds was ∼10-15 MPa. The functionality of surface micromachined polysilicon devices was tested before and after anodic bonding. 100% of thermal actuators, 94% of torsional ratcheting actuators, and 70% of microengines functioned after bonding. The 70% yield was calculated from a test sample of 25 devices.

Effects of Packaging Induced Stress on MEMS Devices and Its Improvements

2006 ◽  
Vol 326-328 ◽  
pp. 529-532
Author(s):  
Sung Hoon Choa ◽  
Moon Chul Lee ◽  
Yong Chul Cho
Keyword(s):  
Silicon On Insulator ◽  
Anodic Bonding ◽  
Mems Devices ◽  
Wafer Level ◽  
Process Technology ◽  
Molding Compound ◽  
Mems Packaging ◽  
Induced Stress ◽  
Induced Structure ◽  
Glass Process

In MEMS, packaging induced stress or stress induced structure deformation becomes increasing concerns since it directly affects the performance of the device. The conventional MEMS SOI (silicon-on-insulator) gyroscope, packaged using the anodic bonding at the wafer level and EMC (epoxy molding compound) molding, has a deformation of MEMS structure caused by thermal expansion mismatch. Therefore we propose a packaged SiOG (Silicon On Glass) process technology and more robust spring design.

Integrated Microsystems

2012 ◽  
Vol 81 ◽  
pp. 55-64 ◽  
Author(s):  
Masayoshi Esashi ◽  
Shuji Tanaka
Keyword(s):  
Wireless Systems ◽  
Tactile Sensor ◽  
Wafer Level ◽  
Micro Electro Mechanical Systems ◽  
Silicon Chips ◽  
Open Collaboration ◽  
Wafer Level Packaging ◽  
Integrated Microsystems ◽  
Safety Systems ◽  
The Cost

Technology called MEMS (Micro Electro Mechanical Systems) or microsystems are heterogeneous integration on silicon chips and play important roles as sensors. MEMS as switches and resonators fabricated on LSI are needed for future multi-band wireless systems. MEMS for safety systems as event driven tactile sensor network for nursing robot are developed. Wafer level packaging for MEMS and open collaboration to reduce the cost for the development are discussed.

Micro-Electro-Mechanical Systems (MEMS) Micro-Heater

2012 ◽  
Author(s):  
C. N. Janakos ◽  
F. T. Goericke ◽  
A. P. Pisano
Keyword(s):  
Mechanical Systems ◽  
Testing Device ◽  
Mems Devices ◽  
Micro Electro Mechanical Systems ◽  
Mems Packaging ◽  
Rate Table ◽  
Heating Device ◽  
Localized Heating

This research addresses the problem of not having access to a localized heating device that easily integrates a variety of testing needs with MEMS packaging. This device can heat MEMS while simultaneously in vacuum, exposed to harsh gases and on a rate table. The solution is a micro-heater built directly into its packaging with the capability to test MEMS at vacuum, which can be pumped down to 1 Torr in a fraction of a second and heats the device to approximately 170 degrees Celsius to simulate the temperatures MEMS devices endure. This packaging integrated with a testing device can accommodate a broad range of MEMS devices.

Wafer-Level Packaging for Micro-Electro-Mechanical Systems Using Surface Activated Bonding

2007 ◽  
Vol 46 (4B) ◽  
pp. 2768-2770 ◽  
Author(s):  
Yoshiyuki Takegawa ◽  
Toru Baba ◽  
Takafumi Okudo ◽  
Yuji Suzuki
Keyword(s):  
Mechanical Systems ◽  
Wafer Level ◽  
Micro Electro Mechanical Systems ◽  
Wafer Level Packaging

On Hermeticity Detection of Wafer Level Packages for MEMS Devices

2005 ◽  
Author(s):  
A. Goswami ◽  
B. Han ◽  
C. Wade ◽  
A. Chien
Keyword(s):  
Mems Devices ◽  
Rate Measurement ◽  
Wafer Level ◽  
Measurement Sensitivity ◽  
Leak Test ◽  
Design Assessment ◽  
Hermetic Packaging ◽  
Wafer Level Packaging ◽  
Test Parameters ◽  
Leak Testing

Wafer level packaging has emerged as one of the promising solutions for hermetic packaging of MEMS devices. Detection of the level of hermeticity of the package is essential for reliability and design assessment of the devices. Traditionally, hermeticity has been tested using Helium based fine leak testing. However, there are limitations when this technique is used for the hermeticity detection of small volumes (< 10−3 cc) that are typical in wafer level packages. This paper reviews the helium fine leak test, its limitations and the influence of the different test parameters on leakage rate measurement are analyzed for wafer level packages with small cavity volumes. The results indicate a need for development of a new hermeticity measurement technique to achieve the measurement sensitivity required for wafer level packages.

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