Quantum-Dot Transistor Based Multi-Bit Multiplier Unit for In-Memory Computing

2020 ◽  
Vol 29 (01n04) ◽  
pp. 2040007
Author(s):  
Yang Zhao ◽  
Fengyu Qian ◽  
Faquir Jain ◽  
Lei Wang
Keyword(s):  
Quantum Dot ◽  
Data Processing ◽  
High Performance ◽  
Memory Cell ◽  
Process Variations ◽  
High Energy ◽  
Data Movement ◽  
Neuron Networks ◽  
Fast Processing ◽  
Dot Product

In-memory computing is an emerging technique to fulfill the fast growing demand for high-performance data processing. This technique provides fast processing and high throughput by accessing data stored in the memory array rather than dealing with complicated operation and data movement on hard drive. For data processing, the most important computation is dot product, which is also the core computation for applications such as deep learning neuron networks, machine learning, etc. As multiplication is the key function in dot product, it is critical to improve its performance and achieve faster memory processing. In this paper, we present a design with the ability to perform in-memory multi-bit multiplications. The proposed design is implemented by using quantum-dot transistors, which enable multi-bit computations in the memory cell. Experimental results demonstrate that the proposed design provides reliable in-memory multi-bit multiplications with high density and high energy efficiency. Statistical analysis is performed using Monte Carlo simulations to investigate the process variations and error effects.

NAND And NOR Logic-In-Memory Comprising Silicon Nanowire Feedback Field-Effect Transistors

2021 ◽  
Author(s):  
Yejin Yang ◽  
Juhee Jeon ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Processing Speed ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Silicon Nanowire ◽  
Logic Gate ◽  
High Energy ◽  
Zero Bias ◽  
Computing Systems ◽  
Data Movement

Abstract The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindrance, logic-in-memory (LIM) has been proposed that performs both data processing and memory operations. Here, we present a NAND and NOR LIM composed of silicon nanowidre feedback field-effect transistors, whose configuration resembles that of CMOS logic gate circuits. The LIM can perform memory operations to retain its output logic under zero-bias conditions as well as logic operations with a high processing speed of nanoseconds. The newly proposed dynamic voltage-transfer characteristics verify the operating principle of the LIM. This study demonstrates that the NAND and NOR LIM has promising potential to resolve power and processing speed issues.

scholarly journals Versatile stochastic dot product circuits based on nonvolatile memories for high performance neurocomputing and neurooptimization

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
M. R. Mahmoodi ◽  
M. Prezioso ◽  
D. B. Strukov
Keyword(s):  
High Performance ◽  
Memory Cell ◽  
Stochastic Neural Networks ◽  
Dynamic Scaling ◽  
Cell Array ◽  
Analog Memory ◽  
Partitioning Problem ◽  
Dot Product ◽  
Hidden Neurons ◽  
Efficient Realization

Abstract The key operation in stochastic neural networks, which have become the state-of-the-art approach for solving problems in machine learning, information theory, and statistics, is a stochastic dot-product. While there have been many demonstrations of dot-product circuits and, separately, of stochastic neurons, the efficient hardware implementation combining both functionalities is still missing. Here we report compact, fast, energy-efficient, and scalable stochastic dot-product circuits based on either passively integrated metal-oxide memristors or embedded floating-gate memories. The circuit’s high performance is due to mixed-signal implementation, while the efficient stochastic operation is achieved by utilizing circuit’s noise, intrinsic and/or extrinsic to the memory cell array. The dynamic scaling of weights, enabled by analog memory devices, allows for efficient realization of different annealing approaches to improve functionality. The proposed approach is experimentally verified for two representative applications, namely by implementing neural network for solving a four-node graph-partitioning problem, and a Boltzmann machine with 10-input and 8-hidden neurons.

scholarly journals Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition

Sensors ◽  
2021 ◽  
Vol 21 (22) ◽  
pp. 7759
Author(s):  
Alessandro Cilardo
Keyword(s):  
Data Acquisition ◽  
High Performance ◽  
High Energy Physics ◽  
Direct Memory Access ◽  
High Energy ◽  
Data Movement ◽  
Horizon 2020 ◽  
Direct Exposure ◽  
Efficient Data ◽  
Network Interfaces

Efficient data movement in multi-node systems is a crucial issue at the crossroads of scientific computing, big data, and high-performance computing, impacting demanding data acquisition applications from high-energy physics to astronomy, where dedicated accelerators such as FPGA devices play a key role coupled with high-performance interconnect technologies. Building on the outcome of the RECIPE Horizon 2020 research project, this work evaluates the use of high-bandwidth interconnect standards, namely InfiniBand EDR and HDR, along with remote direct memory access functions for direct exposure of FPGA accelerator memory across a multi-node system. The prototype we present aims at avoiding dedicated network interfaces built in the FPGA accelerator itself, leaving most of the resources for user acceleration and supporting state-of-the-art interconnect technologies. We present the detail of the proposed system and a quantitative evaluation in terms of end-to-end bandwidth as concretely measured with a real-world FPGA-based multi-node HPC workload.

scholarly journals Survey on Near-Data Processing: Applications and Architectures

2021 ◽  
Vol 16 (2) ◽  
pp. 1-17
Author(s):  
Paulo Cesar Santos ◽  
Francis Birck Moreira ◽  
Aline Santana Cordeiro ◽  
Sairo Raoní Santos ◽  
Tiago Rodrigo Kepe ◽  
...  
Keyword(s):  
Energy Consumption ◽  
Data Processing ◽  
Data Transfer ◽  
High Energy ◽  
Data Movement ◽  
History Of ◽  
Memory Bottleneck ◽  
High Energy Consumption

One of the main challenges for modern processors is the data transfer between processor and memory. Such data movement implies high latency and high energy consumption. In this context, Near-Data Processing (NDP) proposals have started to gain acceptance as an accelerator device. Such proposals alleviate the memory bottleneck by moving instructions to data whereabouts. The first proposals date back to the 1990s, but it was only in the 2010s that we could observe an increase in papers addressing NDP. It occurred together with the appearance of 3D-stacked chips with logic and memory stacked layers. This survey presents a brief history of these accelerators, focusing on the applications domains migrated to near-data and the proposed architectures. We also introduce a new taxonomy to classify such architectural proposals according to their data distance.

Efficient Co-Harvesting of Solar Energy and Low-Grade Heat by Molecular Photoswitches for High Energy Density, Long-Term Stable Solar Thermal Battery

2019 ◽  
Author(s):  
Zhao-Yang Zhang ◽  
Tao LI
Keyword(s):  
Energy Density ◽  
Solar Energy ◽  
High Performance ◽  
High Energy ◽  
Solar Thermal ◽  
High Energy Density ◽  
Low Grade ◽  
Thermal Battery ◽  
Low Grade Heat

Solar energy and ambient heat are two inexhaustible energy sources for addressing the global challenge of energy and sustainability. Solar thermal battery based on molecular switches that can store solar energy and release it as heat has recently attracted great interest, but its development is severely limited by both low energy density and short storage stability. On the other hand, the efficient recovery and upgrading of low-grade heat, especially that of the ambient heat, has been a great challenge. Here we report that solar energy and ambient heat can be simultaneously harvested and stored, which is enabled by room-temperature photochemical crystal-to-liquid transitions of small-molecule photoswitches. The two forms of energy are released together to produce high-temperature heat during the reverse photochemical phase change. This strategy, combined with molecular design, provides high energy density of 320-370 J/g and long-term storage stability (half-life of about 3 months). On this basis, we fabricate high-performance, flexible film devices of solar thermal battery, which can be readily recharged at room temperature with good cycling ability, show fast rate of heat release, and produce high-temperature heat that is >20<sup> o</sup>C higher than the ambient temperature. Our work opens up a new avenue to harvest ambient heat, and demonstrate a feasible strategy to develop high-performance solar thermal battery.

Efficient Co-Harvesting of Solar Energy and Low-Grade Heat by Molecular Photoswitches for High Energy Density, Long-Term Stable Solar Thermal Battery

2019 ◽  
Author(s):  
Zhao-Yang Zhang ◽  
Tao LI
Keyword(s):  
Energy Density ◽  
Solar Energy ◽  
High Performance ◽  
High Energy ◽  
Solar Thermal ◽  
High Energy Density ◽  
Low Grade ◽  
Thermal Battery ◽  
Low Grade Heat

Solar energy and ambient heat are two inexhaustible energy sources for addressing the global challenge of energy and sustainability. Solar thermal battery based on molecular switches that can store solar energy and release it as heat has recently attracted great interest, but its development is severely limited by both low energy density and short storage stability. On the other hand, the efficient recovery and upgrading of low-grade heat, especially that of the ambient heat, has been a great challenge. Here we report that solar energy and ambient heat can be simultaneously harvested and stored, which is enabled by room-temperature photochemical crystal-to-liquid transitions of small-molecule photoswitches. The two forms of energy are released together to produce high-temperature heat during the reverse photochemical phase change. This strategy, combined with molecular design, provides high energy density of 320-370 J/g and long-term storage stability (half-life of about 3 months). On this basis, we fabricate high-performance, flexible film devices of solar thermal battery, which can be readily recharged at room temperature with good cycling ability, show fast rate of heat release, and produce high-temperature heat that is >20<sup> o</sup>C higher than the ambient temperature. Our work opens up a new avenue to harvest ambient heat, and demonstrate a feasible strategy to develop high-performance solar thermal battery.

scholarly journals Numerical algorithms for high-performance computational science

2020 ◽  
Vol 378 (2166) ◽  
pp. 20190066 ◽  
Author(s):  
Jack Dongarra ◽  
Laura Grigori ◽  
Nicholas J. Higham
Keyword(s):  
High Performance ◽  
Numerical Algorithms ◽  
Computational Science ◽  
Floating Point ◽  
Important Criterion ◽  
Data Movement ◽  
Floating Point Arithmetic ◽  
High Performance Computers ◽  
Point Arithmetic ◽  
Speed And Accuracy

A number of features of today’s high-performance computers make it challenging to exploit these machines fully for computational science. These include increasing core counts but stagnant clock frequencies; the high cost of data movement; use of accelerators (GPUs, FPGAs, coprocessors), making architectures increasingly heterogeneous; and multi- ple precisions of floating-point arithmetic, including half-precision. Moreover, as well as maximizing speed and accuracy, minimizing energy consumption is an important criterion. New generations of algorithms are needed to tackle these challenges. We discuss some approaches that we can take to develop numerical algorithms for high-performance computational science, with a view to exploiting the next generation of supercomputers. This article is part of a discussion meeting issue ‘Numerical algorithms for high-performance computational science’.

scholarly journals Defect-induced B4C electrodes for high energy density supercapacitor devices

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Özge Balcı ◽  
Merve Buldu ◽  
Ameen Uddin Ammar ◽  
Kamil Kiraz ◽  
Mehmet Somer ◽  
...  
Keyword(s):  
Active Carbon ◽  
High Performance ◽  
Carbon Sources ◽  
High Energy ◽  
High Energy Density ◽  
Synthesis Conditions ◽  
High Energy Ball Mill ◽  
Energy Ball ◽  
G Ratio ◽  
Energy And Power Density

AbstractBoron carbide powders were synthesized by mechanically activated annealing process using anhydrous boron oxide (B2O3) and varying carbon (C) sources such as graphite and activated carbon: The precursors were mechanically activated for different times in a high energy ball mill and reacted in an induction furnace. According to the Raman analyses of the carbon sources, the I(D)/I(G) ratio increased from ~ 0.25 to ~ 0.99, as the carbon material changed from graphite to active carbon, indicating the highly defected and disordered structure of active carbon. Complementary advanced EPR analysis of defect centers in B4C revealed that the intrinsic defects play a major role in the electrochemical performance of the supercapacitor device once they have an electrode component made of bare B4C. Depending on the starting material and synthesis conditions the conductivity, energy, and power density, as well as capacity, can be controlled hence high-performance supercapacitor devices can be produced.

scholarly journals Recent Advances in the Synthesis of Polymer-Grafted Low-K and High-K Nanoparticles for Dielectric and Electronic Applications

Molecules ◽  
2021 ◽  
Vol 26 (10) ◽  
pp. 2942
Author(s):  
Bhausaheb V. Tawade ◽  
Ikeoluwa E. Apata ◽  
Nihar Pradhan ◽  
Alamgir Karim ◽  
Dharmaraj Raghavan
Keyword(s):  
Energy Density ◽  
Polymer Nanocomposites ◽  
High Performance ◽  
Breakdown Strength ◽  
Polymer Nanocomposite ◽  
High Energy ◽  
Polymer Chains ◽  
High Energy Density ◽  
Grafted Nanoparticles ◽  
Grafting From

The synthesis of polymer-grafted nanoparticles (PGNPs) or hairy nanoparticles (HNPs) by tethering of polymer chains to the surface of nanoparticles is an important technique to obtain nanostructured hybrid materials that have been widely used in the formulation of advanced polymer nanocomposites. Ceramic-based polymer nanocomposites integrate key attributes of polymer and ceramic nanomaterial to improve the dielectric properties such as breakdown strength, energy density and dielectric loss. This review describes the ”grafting from” and ”grafting to” approaches commonly adopted to graft polymer chains on NPs pertaining to nano-dielectrics. The article also covers various surface initiated controlled radical polymerization techniques, along with templated approaches for grafting of polymer chains onto SiO2, TiO2, BaTiO3, and Al2O3 nanomaterials. As a look towards applications, an outlook on high-performance polymer nanocomposite capacitors for the design of high energy density pulsed power thin-film capacitors is also presented.

Sulfur vacancies in Co9S8-x/N-doped graphene enhancing electrochemical kinetics to high-performance lithium sulfur batteries

2021 ◽  
Author(s):  
Haojie Li ◽  
Yihua Song ◽  
Kai Xi ◽  
Wei Wang ◽  
Sheng Liu ◽  
...  
Keyword(s):  
Cathode Materials ◽  
High Performance ◽  
Catalytic Conversion ◽  
High Energy ◽  
Electrochemical Kinetics ◽  
Lithium Sulfur Batteries ◽  
Doped Graphene ◽  
Sulfur Battery ◽  
Areal Capacity ◽  
Lithium Sulfur

A sufficient areal capacity is necessary for achieving high-energy lithium sulfur battery, which requires high enough sulfur loading in cathode materials. Therefore, kinetically fast catalytic conversion of polysulfide intermediates is...

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