COMPARISON OF SiC AND ZnO FIELD EFFECT TRANSISTORS FOR HIGH POWER APPLICATIONS

2009 ◽  
Vol 23 (20n21) ◽  
pp. 2533-2540 ◽  
Author(s):  
H. ARABSHAHI
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Bulk Material ◽  
Ballistic Transport ◽  
Drain Current ◽  
Drain Voltage ◽  
Response Characteristics ◽  
Ensemble Monte Carlo ◽  
Electron Transport Properties ◽  
Frequency Response Characteristics

An ensemble Monte Carlo method is used to compare the potentialities of SiC and ZnO materials for field effect transistors. First, bulk material electron transport properties are compared and then the operation of MESFETs made from them are investigated. The simulated device geometries and doping are matched to the nominal parameters described for the experimental structures as closely as possible. Simulations of SiC MESFETs of lengths 2, 2.6 and 3.2 μm have been carried out and compared these results with those on ZnO MESFETs of the same dimensions. The direct current IV characteristics of the two materials were found to be similar, though the ZnO characteristics were on the whole superior, reaching their operating point at higher drain voltages and possessing higher gains. However, oscillations in the drain current caused by changes in drain voltage in the ZnO devices were not present to the same degree in the SiC devices. This difference is caused partially by the onset of the negative differential regime in SiC at a higher electric field than in ZnO but the primary cause is the longer ballistic transport times in SiC . This suggests that ZnO MESFETs may prove to have superior frequency response characteristics than SiC MESFETs.

ON THE DRAIN CURRENT SATURATION IN CARBON NANOTUBE FIELD EFFECT TRANSISTORS

NANO ◽  
2010 ◽  
Vol 05 (03) ◽  
pp. 161-165 ◽  
Author(s):  
A. BENFDILA ◽  
S. ABBAS ◽  
R. IZQUIERDO ◽  
R. TALMAT ◽  
A. VASEASHTA
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
Ballistic Transport ◽  
Drain Current ◽  
Functional Behavior ◽  
Current Saturation ◽  
Current Voltage ◽  
Saturation Region ◽  
Current Voltage Characteristics

Electronic devices based on carbon nanotubes (CNTs) show potential for circuit miniaturization due to their superior electrical characteristics and reduced dimensionality. The CNT field effect transistors (CNFETs) offer breakthrough in miniaturization of various electronic circuits. Investigation of ballistic transport governing the operation of CNFETs is essential for understanding the device's functional behavior. This investigation is focused on a study of current–voltage characteristics of device behavior in hard saturation region. The investigation utilizes a set of current–voltage characteristics obtained on typical devices. This work is an extension of our earlier work describing application of our approach to Si -MOSFET behavior in the saturation region.

Characteristics of Gamma–Ray Irradiated Pentacene Organic Thin Film Field Effect Transistors

2011 ◽  
Vol 306-307 ◽  
pp. 185-192 ◽  
Author(s):  
Hiroaki Yano ◽  
Li Cai ◽  
Toshio Hirao ◽  
Zong Fan Duan ◽  
Yutaro Takayanagi ◽  
...  
Keyword(s):  
Field Effect ◽  
Gamma Ray ◽  
Field Effect Transistors ◽  
Uv Light ◽  
Drain Current ◽  
Gate Insulator ◽  
Organic Thin Film ◽  
Drain Voltage ◽  
Continuous Increase ◽  
Uv Light Irradiation

P-channel pentacene field effect transistorswith a Si/SiO2/pentacene/Au structure were fabricated, and were gamma-ray irradiated with a Co60source. The changes of the drain current IDvs. source/drain voltage VSD(ID- VSD) characteristics were measured after every 200 Gy in silicon (GySi) irradiations up to the total dose of 1200 GySi. The drain current IDcontinuously decreased to less than 10 % of that before irradiation after 1200 GySiirradiation. The threshold voltage Vthcontinuously decreased up to 800 GySi, started to saturate above 800 GySi,and recovered above1000 GySi. The mobility m continued to decrease up to 1200 GySi. Those behaviors were explained by accumulation of positive trapped charge within the gate insulator SiO2near the interface, continuous increase of interface traps near the interface between the SiO2and pentacene, and build up of electrons in the channel regions. These behaviors were discussed in comparisons with previously reported results on ultraviolet (UV) light irradiation experiments on similarly structured pentacene-based transistors.

1360 V, 5.0 mΩcm2 Double-Implanted MOSFETs Fabricated on 4H-SiC(000-1)

2010 ◽  
Vol 645-648 ◽  
pp. 987-990 ◽  
Author(s):  
Hiroshi Kono ◽  
Takuma Suzuki ◽  
Makoto Mizukami ◽  
Chiharu Ota ◽  
Shinsuke Harada ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Gate Bias ◽  
Drain Voltage ◽  
Blocking Voltage

Silicon carbide Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors (DIMOSFETs) were fabricated on 4H-SiC (000-1) carbon face. The DIMOSFETs were characterized from room temperature to 250°C. At room temperature, they showed a specific on-resistance of 4.9 mΩcm2 at a gate bias of 20 V and a drain voltage of 1.0 V. The specific on-resistance taken at a drain current (Id) of 260 A/cm2 was 5.0 mΩcm2. The blocking voltage of this device was higher than 1360 V at room temperature. At 250°C, the specific on-resistance increased from 5.0 mΩcm2 to 12.5 mΩcm2 and the threshold voltage determined at Id = 26 mA/cm2 decreased from 5.5 V to 4.3 V.

Preparation of integrated chemical sensors using commercial VLSI technology

1987 ◽  
Vol 65 (5) ◽  
pp. 1072-1078 ◽  
Author(s):  
Paul G. Glavina ◽  
D. Jed Harrison
Keyword(s):  
Chemical Sensors ◽  
Linear Response ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Microelectrode Arrays ◽  
Drain Current ◽  
Cyclic Voltammetric ◽  
Design Rules ◽  
Vlsi Technology ◽  
Commercial Technology

The fabrication of ion sensitive field effect transistors (ISFET) and microelectrode arrays for use as chemical sensors using a commercial CMOS fabrication process is described. The commercial technology is readily available through the Canadian Microelectronics Corporation; however, several of the recommended design rules must be ignored in preparing chemical sensors using this process. The ISFET devices show near theoretical response to K+ in aqueous solution (55 mV slope) when coated with a K+ sensitive membrane. An extended gate ion sensitive device is presented which offers advantages in encapsulation of ISFET sensors. The source-drain current of both devices show a linear response to log [Formula: see text] in contrast to ISFETs previously reported that have high internal lead resistances. Al and poly-Si microelectrode arrays are fabricated commercially and then Pt is electrodeposited on the microelectrodes. The resulting arrays show good cyclic voltammetric response to Fe(CN)64− and Ru(NH3)63+ and are relatively durable.

AlGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors (MOSHFETs) with the Delta-Doped Barrier Layer

2002 ◽  
Vol 743 ◽  
Author(s):  
Z. Y. Fan ◽  
J. Li ◽  
J. Y. Lin ◽  
H. X. Jiang ◽  
Y. Liu ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Cutoff Frequency ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Heterostructure ◽  
Heterostructure Field Effect Transistors ◽  
Gate Control

ABSTRACTThe fabrication and characterization of AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with the δ-doped barrier are reported. The incorporation of the SiO2 insulated-gate and the δ-doped barrier into HFET structures reduces the gate leakage and improves the 2D channel carrier mobility. The device has a high drain-current-driving and gate-control capabilities as well as a very high gate-drain breakdown voltage of 200 V, a cutoff frequency of 15 GHz and a maximum frequency of oscillation of 34 GHz for a gate length of 1 μm. These characteristics indicate a great potential of this structure for high-power-microwave applications.

Temporal Changes in Source–Drain Current for Organic Field-Effect Transistors Caused by Dipole on Insulator Surface

2008 ◽  
Vol 1 ◽  
pp. 061801 ◽  
Author(s):  
Kouji Suemori ◽  
Misuzu Taniguchi ◽  
Sei Uemura ◽  
Manabu Yoshida ◽  
Satoshi Hoshino ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Temporal Changes ◽  
Organic Field Effect Transistors ◽  
Insulator Surface

Influence of work function variation of metal gates on fluctuation of sub-threshold drain current for fin field-effect transistors with undoped channels

2014 ◽  
Vol 53 (4S) ◽  
pp. 04EC11 ◽  
Author(s):  
Takashi Matsukawa ◽  
Yongxun Liu ◽  
Kazuhiko Endo ◽  
Junichi Tsukada ◽  
Hiromi Yamauchi ◽  
...  
Keyword(s):  
Work Function ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Metal Gates

scholarly journals Effects of Doping Concentration on Device Performance of GaN-based Nano-regime MOSFETs

2017 ◽  
Vol 16 (1) ◽  
pp. 69-74
Author(s):  
Md Iktiham Bin Taher ◽  
Md. Tanvir Hasan
Keyword(s):  
Field Effect ◽  
Doping Concentration ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Gate Length ◽  
Drain Voltage ◽  
Switching Device ◽  
Device Applications

Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are promising for switching device applications. The doping of n- and p-layers is varied to evaluate the figure of merits of proposed devices with a gate length of 10 nm. Devices are switched from OFF-state (gate voltage, VGS = 0 V) to ON-state (VGS = 1 V) for a fixed drain voltage, VDS = 0.75 V. The device with channel doping of 1×1016 cm-3 and source/drain (S/D) of 1×1020 cm-3 shows good device performance due to better control of gate over channel. The ON-current (ION), OFF-current (IOFF), subthreshold swing (SS), drain induce barrier lowering (DIBL), and delay time are found to be 6.85 mA/μm, 5.15×10-7 A/μm, 87.8 mV/decade, and 100.5 mV/V, 0.035 ps, respectively. These results indicate that GaN-based MOSFETs are very suitable for the logic switching application in nanoscale regime.

scholarly journals Line-Edge Roughness from Extreme Ultraviolet Lithography to Fin-Field-Effect-Transistor: Computational Study

Micromachines ◽  
2021 ◽  
Vol 12 (12) ◽  
pp. 1493
Author(s):  
Sang-Kon Kim
Keyword(s):  
Field Effect ◽  
Extreme Ultraviolet ◽  
Field Effect Transistors ◽  
Computational Study ◽  
Drain Current ◽  
Extreme Ultraviolet Lithography ◽  
Line Edge Roughness ◽  
Stochastic Fluctuation ◽  
Ultraviolet Lithography ◽  
Edge Roughness

Although extreme ultraviolet lithography (EUVL) has potential to enable 5-nm half-pitch resolution in semiconductor manufacturing, it faces a number of persistent challenges. Line-edge roughness (LER) is one of critical issues that significantly affect critical dimension (CD) and device performance because LER does not scale along with feature size. For LER creation and impacts, better understanding of EUVL process mechanism and LER impacts on fin-field-effect-transistors (FinFETs) performance is important for the development of new resist materials and transistor structure. In this paper, for causes of LER, a modeling of EUVL processes with 5-nm pattern performance was introduced using Monte Carlo method by describing the stochastic fluctuation of exposure due to photon-shot noise and resist blur. LER impacts on FinFET performance were investigated using a compact device method. Electric potential and drain current with fin-width roughness (FWR) based on LER and line-width roughness (LWR) were fluctuated regularly and quantized as performance degradation of FinFETs.

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