LOW POWER LOW-PASS FILTER WITH PROGRAMMABLE CUTOFF FREQUENCY BASED ON A TUNABLE UNITY GAIN FREQUENCY OPERATIONAL AMPLIFIER

2010 ◽  
Vol 19 (08) ◽  
pp. 1651-1663 ◽  
Author(s):  
SOLIMAN A. MAHMOUD
Keyword(s):  
Tuning Range ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Op Amp ◽  
Op Amps ◽  
Low Pass ◽  
Unity Gain ◽  
Variable G

In this paper, a sixth-order reconfigurable low pass filter (LPF) is realized using 0.25 μm TSMC CMOS technology. The filter is based on a cascading connection of bi-quadratic active-Gm-RC cells. The active-Gm-RC cells are realized using compensated op-amps with variable transconductance gain and variable compensation capacitors (variable Gm–Cc op-amp). The tuning range of the filter's cutoff frequency is from 77.4 KHz to 37.78 MHz. The filter operates from a single supply of 1.5 V. Simulations results using PSPICE for the proposed reconfigurable LPF are presented.

scholarly journals A CMOS Programmable Fourth-Order Butterworth Active-RC Low-Pass Filter

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 204 ◽  
Author(s):  
Changchun Zhang ◽  
Long Shang ◽  
Yongkai Wang ◽  
Lu Tang
Keyword(s):  
Radio Frequency Identification ◽  
Supply Voltage ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Silicon Area ◽  
Fully Differential ◽  
Low Pass ◽  
Low Sensitivity

This paper presents a low-pass filter (LPF) for an ultra-high frequency (UHF) radio frequency identification (RFID) reader transmitter in standard SMIC 0.18 μm CMOS technology. The active-RC topology and Butterworth approximation function are employed mainly for high linearity and high flatness respectively. Two cascaded fully-differential Tow-Thomas biquads are chosen for low sensitivity to process errors and strong resistance to the imperfection of the involved two-stage fully-differential operational amplifiers. Besides, the LPF is programmable in order to adapt to the multiple data rate standards. Measurement results show that the LPF has the programmable bandwidths of 605/870/1020/1330/1530/2150 kHz, the optimum input 1dB compression point of −7.81 dBm, and the attenuation of 50 dB at 10 times cutoff frequency, with the overall power consumption of 12.6 mW from a single supply voltage of 1.8 V. The silicon area of the LPF core is 0.17 mm2.

Design and Simulation of Switched Capacitor Filter for Speed Change Parameter Converter

2013 ◽  
Vol 562-565 ◽  
pp. 1132-1136
Author(s):  
Xiao Wei Liu ◽  
Jian Yang ◽  
Song Chen ◽  
Liang Liu ◽  
Rui Zhang ◽  
...  
Keyword(s):  
Stop Band ◽  
Cutoff Frequency ◽  
Rapid Change ◽  
Pass Band ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
The Time Domain

In this paper, we design a high-order switched capacitor filter for rapid change parameter converter. This design uses a structure which consists of three biquads filter sub-units. The design is a 6th-order SC elliptic low-pass filter, and the sample frequency is 250 kHz. By the MATLAB Simulink simulation, the system can meet the design requirements in the time domain. In this paper, the 6th-order switched capacitor elliptic low-pass filter was implemented under 0.5 um CMOS process and simulated in Cadence. The final simulation results show that the pass-band cutoff frequency is 10 kHz, and the maximum pass-band ripple is about 0.106 dB. The stop-band cutoff frequency is 20 kHz, and the minimum stop-band attenuation is 74.78 dB.

THE DIFFERENTIAL DIFFERENCE OPERATIONAL FLOATING AMPLIFIER: NEW CMOS REALIZATIONS AND APPLICATIONS

2009 ◽  
Vol 18 (07) ◽  
pp. 1287-1308 ◽  
Author(s):  
EMAN A. SOLIMAN ◽  
SOLIMAN A. MAHMOUD
Keyword(s):  
Analog Circuits ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Variable Gain Amplifiers ◽  
Variable Gain ◽  
Fully Differential ◽  
Filter Performance ◽  
Low Pass ◽  
Band Pass

This paper presents different novel CMOS realizations for the differential difference operational floating amplifier (DDOFA). The DDOFA was first introduced in Ref. 1 and was used to realize different analog circuits like integrators, filters and variable gain amplifiers. New CMOS realizations for the DDOFA are introduced in this literature. Furthermore the DDOFA is modified to realize a fully differential current conveyor (FDCC). Novel CMOS realizations of the FDCC are presented. The FDCC is used to realize second-order band pass–low-pass filter. Performance comparisons between the different realizations of the DDOFA and FDCC are given in this literature. PSPICE simulations of the overall proposed circuits are given using 0.25 μm CMOS Technology from TMSC MOSIS model and dual supply voltages of ±1.5 V.

Improved Stator Flux Estimation for Direct Torque Control of Induction Motor Drives

2016 ◽  
Vol 7 (4) ◽  
pp. 1049
Author(s):  
Yahya Ahmed Alamri ◽  
Nik Rumzi Nik Idris ◽  
Ibrahim Mohd. Alsofyani ◽  
Tole Sutikno
Keyword(s):  
Induction Motor ◽  
Cutoff Frequency ◽  
Direct Torque Control ◽  
Motor Drives ◽  
Torque Control ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Flux Estimation ◽  
Stator Flux

<p>Stator flux estimation using voltage model is basically the integration of the induced stator back electromotive force (emf) signal. In practical implementation the pure integration is replaced by a low pass filter to avoid the DC drift and saturation problems at the integrator output because of the initial condition error and the inevitable DC components in the back emf signal. However, the low pass filter introduces errors in the estimated stator flux which are significant at frequencies near or lower than the cutoff frequency. Also the DC components in the back emf signal are amplified at the low pass filter output by a factor equals to . Therefore, different integration algorithms have been proposed to improve the stator flux estimation at steady state and transient conditions. In this paper a new algorithm for stator flux estimation is proposed for direct torque control (DTC) of induction motor drives. The proposed algorithm is composed of a second order high pass filter and an integrator which can effectively eliminates the effect of the error initial condition and the DC components. The amplitude and phase errors compensation algorithm is selected such that the steady state frequency response amplitude and phase angle are equivalent to that of the pure integrator and the multiplication and division by stator frequency are avoided. Also the cutoff frequency selection is improved; even small value can filter out the DC components in the back emf signal. The simulation results show the improved performance of the induction motor direct torque control drive with the proposed stator flux estimation algorithm. The simulation results are verified by the experimental results.</p>

scholarly journals A CMOS Low Pass Filter for SoC Lock-in-Based Measurement Devices

Sensors ◽  
2019 ◽  
Vol 19 (23) ◽  
pp. 5173 ◽  
Author(s):  
Jorge Pérez-Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano
Keyword(s):  
Dynamic Range ◽  
Current Trend ◽  
Cutoff Frequency ◽  
Oxide Semiconductor ◽  
Constant Current ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Compact Size ◽  
Low Pass ◽  
Lock In

This paper presents a fully integrated Gm–C low pass filter (LPF) based on a current steering Gm reduction-tuning technique, specifically designed to operate as the output stage of a SoC lock-in amplifier. To validate this proposal, a first-order and a second-order single-ended topology were integrated into a 1.8 V to 0.18 µm CMOS (Complementary Metal-Oxide-Semiconductor) process, showing experimentally a tuneable cutoff frequency that spanned five orders of magnitude, from tens of mHz to kHz, with a constant current consumption (below 3 µA/pole), compact size (<0.0140 mm2/pole), and a dynamic range better than 70 dB. Compared to state-of-the-art solutions, the proposed approach exhibited very competitive performances while simultaneously fully satisfying the demanding requirements of on-chip portable measurement systems in terms of highly efficient area and power. This is of special relevance, taking into account the current trend towards multichannel instruments to process sensor arrays, as the total area and power consumption will be proportional to the number of channels.

scholarly journals Floating Active Inductor Based Trans-Impedance Amplifier in 0.18 μm CMOS Technology for Optical Applications

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1547
Author(s):  
Xiangyu Chen ◽  
Yasuhiro Takahashi
Keyword(s):  
Power Dissipation ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Chip Area ◽  
Active Inductors ◽  
Low Pass ◽  
Optical Applications ◽  
Fifth Order

In this paper, a transimpedance amplifier (TIA) based on floating active inductors (FAI) is presented. Compared with conventional TIAs, the proposed TIA has the advantages of a wider bandwidth, lower power dissipation, and smaller chip area. The schematics and characteristics of the FAI circuit are explained. Moreover, the proposed TIA employs the combination of capacitive degeneration, the broadband matching network, and the regulated cascode input stage to enhance the bandwidth and gain. This turns the TIA design into a fifth-order low pass filter with Butterworth response. The TIA is implemented using 0.18 μ m Rohm CMOS technology and consumes only 10.7 mW with a supply voltage of 1.8 V. When used with a 150 fF photodiode capacitance, it exhibits the following characteristics: gain of 41 dB Ω and −3 dB frequency of 10 GHz. This TIA occupies an area of 180 μ m × 118 μ m.

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