Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators

2020 ◽  
Vol 29 (14) ◽  
pp. 2050223
Author(s):  
Joydeep Basu ◽  
Pradip Mandal
Keyword(s):  
Continuous Time ◽  
High Gain ◽  
Design Guidelines ◽  
Operational Amplifiers ◽  
Switched Capacitor ◽  
Common Mode ◽  
Fully Differential ◽  
Op Amp ◽  
Dc Gain ◽  
Minimum Power Consumption

For stabilizing the common-mode output voltage of fully differential operational amplifiers, switched-capacitor (SC) type of common-mode feedback (CMFB) is a familiar technique. This is appropriate for implementing high-gain wide-swing low-power op-amps due to its benefits of minimum power consumption, superior linearity across a large amplifier output swing range, and improved feedback loop stability in comparison to continuous-time CMFB. However, the usage of SC-CMFB requires careful attention to some realistic aspects, details of many of which are available in literature. Nonetheless, its adverse effect on the op-amp’s differential-mode gain has not been investigated much. The explanation for this effect is the SC-CMFB-induced equivalent resistive loading, and this is particularly significant in amplifiers like folded cascode which are intended to provide a high gain. This issue of drop in op-amp dc gain because of SC-CMFB, and the consequence on the realization of continuous-time and discrete-time forms of integrators utilizing such amplifiers is the topic of discussion in this paper. Relevant analytical derivations and circuit simulations at the transistor level are provided. A couple of design guidelines and circuit topologies for minimizing the loading-induced gain reduction are also presented.

Improvement of Gain Accuracy and CMRR of Low Power Instrumentation Amplifier Using High Gain Operational Amplifiers

2020 ◽  
Vol 12 (3) ◽  
pp. 168-174
Author(s):  
Rashmi Sahu ◽  
Maitraiyee Konar ◽  
Sudip Kundu
Keyword(s):  
Low Power ◽  
Building Blocks ◽  
High Gain ◽  
The Other ◽  
Operational Amplifiers ◽  
Instrumentation Amplifier ◽  
Biomedical Signals ◽  
Op Amp ◽  
Op Amps ◽  
Multi Stage

Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.

Design of a New Low Power Fully Differential Amplifier with Settling Time Enhancement Characteristics

2015 ◽  
Vol 24 (06) ◽  
pp. 1550078 ◽  
Author(s):  
Seid Jafar Hosseinipouya ◽  
Farhad Dastadast
Keyword(s):  
High Performance ◽  
Settling Time ◽  
Cmos Process ◽  
Output Stage ◽  
Common Mode ◽  
Class Ab ◽  
Fully Differential ◽  
Op Amp ◽  
Transconductance Amplifier ◽  
Adaptive Biasing

High performance of fully differential operational transconductance amplifier is designed and implemented using a 0.18-μm CMOS process. The implemented op-amp uses common mode feedback (CMFB) circuit operating in weak inversion region which does not affect other electrical characteristics due to eliminating common mode (CM) levels automatically leading to improve CM rejection ratio (CMRR) of the amplifier significantly. Moreover, the output stage has class-AB operation so that its current can be made larger due to increasing the output current dynamically using adaptive biasing circuit. Additionally, the AC currents of the active loads have been significantly reduced using negative impedances to increase the gain of the amplifier. The results show the GBW 2.3 MHz, slew rate 2.6 V/μs and 1% settling time 150 ns with a capacitive load of 15 pF. This amplifier dissipates only 6.2 μW from a 1.2 V power supply.

Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers

2016 ◽  
Vol 25 (10) ◽  
pp. 1650124 ◽  
Author(s):  
S. Rekha ◽  
T. Laxminidhi
Keyword(s):  
Power Supply ◽  
Continuous Time ◽  
Efficient Solution ◽  
Low Voltage ◽  
Cmos Technology ◽  
Common Mode ◽  
Power Efficient ◽  
Differential Amplifiers ◽  
Fully Differential ◽  
Simulation Results

Continuous time common mode feedback (CMFB) circuits for low voltage, low power applications are proposed. Four circuits are proposed for gate/bulk-driven pseudo-differential transconductors operating on sub-1-V power supply. The circuits are validated for a bulk-driven pseudo-differential transconductor operating on 0.5[Formula: see text]V in 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results reveal that the proposed CMFB circuits offer power efficient solution for setting the output common mode of the transconductors. They also load the transconductor capacitively offering capacitance of about 1[Formula: see text]fF to tens of femto farads.

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