Improvement of Gain Accuracy and CMRR of Low Power Instrumentation Amplifier Using High Gain Operational Amplifiers

2020 ◽  
Vol 12 (3) ◽  
pp. 168-174
Author(s):  
Rashmi Sahu ◽  
Maitraiyee Konar ◽  
Sudip Kundu
Keyword(s):  
Low Power ◽  
Building Blocks ◽  
High Gain ◽  
The Other ◽  
Operational Amplifiers ◽  
Instrumentation Amplifier ◽  
Biomedical Signals ◽  
Op Amp ◽  
Op Amps ◽  
Multi Stage

Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.

VARIOUS CURRENT-MODE AND VOLTAGE-MODE INSTRUMENTATION AMPLIFIER TOPOLOGIES SUITABLE FOR INTEGRATION

2010 ◽  
Vol 19 (03) ◽  
pp. 689-699 ◽  
Author(s):  
ERKAN YUCE
Keyword(s):  
Integrated Circuit ◽  
Experimental Tests ◽  
Current Mode ◽  
The Other ◽  
Operational Amplifiers ◽  
Instrumentation Amplifier ◽  
Nmos Transistor ◽  
Current Feedback ◽  
Voltage Mode ◽  
Current Feedback Operational Amplifiers

In this paper, four instrumentation amplifier (IA) topologies, one of which is current-mode (CM) while the others are voltage-mode (VM), are presented. Three of the IAs use one to two current feedback operational amplifiers (CFOAs) while the other one employs only a single NMOS transistor. One of the IA circuits, given as an example, is simple while others are novel. The CM IA is composed of only grounded resistors which have some advantages in integrated circuit (IC) process. Non-ideality effects such as non-ideal gain and parasitic impedances on the performance of introduced IAs are discussed. In order to show the performance of the circuits, we perform experimental tests and simulations by using SPICE program.

Design Low Voltage FGMOS Operational Amplifier for Power Applications

2012 ◽  
Vol 433-440 ◽  
pp. 4189-4193 ◽  
Author(s):  
M. B. K. Jamal ◽  
S. P. Chew ◽  
B. I. Khadijah ◽  
S. B. M. Noormiza
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Electronic Device ◽  
Supply Voltage ◽  
High Gain ◽  
Battery Life ◽  
Op Amp ◽  
Integration Density ◽  
Low Power Dissipation ◽  
High Bandwidth

Due to the rise in demand for portable electronic device, low power and low voltage circuit design is extremely important for the appliances like computers, laptops, mobile phones and etc. Low power dissipation results in longer battery life and better integration density. This can be achieved by designing a modified low voltage op amp. The design of low voltage op amp in this paper is the combination of several low voltage analog cells. The modified low power op amp in this paper is built based on low voltage basic op amp. In this paper, the design objective is to achieve certain criteria such as supply voltage as low as 1 V, high gain more than 40 dB, low power consumption and high bandwidth. The use of FGMOS would increase the operating range of op amp through programming the threshold voltage of the FGMOS. This project is simulated using Silvaco Gateway and Expert.

Optimization of building blocks for multi-stage 17–44 dB 6.1–9.6 mW 90-nm K-band front-ends

2013 ◽  
Vol 3 (4) ◽  
Author(s):  
Apratim Roy ◽  
A. Harun Rashid
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Optimization Procedure ◽  
Building Blocks ◽  
Cmos Technology ◽  
Power Requirement ◽  
Reverse Isolation ◽  
Multi Stage ◽  
Forward Gain ◽  
K Band

AbstractIn this article, five two-stage ∼6-mW and four three-stage ∼9-mW matched amplifier architectures are proposed to establish optimization procedure and quantify relative merits of cascode (CC), common-gate (CG), and commonsource (CS) building blocks for low-voltage low-power multi-stage front-ends. The circuits are simulated with a 90-nm CMOS technology including modeling of layout parasites. Integrated bias trees and passive port matching networks are incorporated in the K-band designs. In the face of process mismatch, variability in noise and gain figures remains <0.39 dB and <7.1 dB from the design values. The five combinations of building blocks in twostage low-power (6.1–6.6 mW) amplifiers achieve linearity (IIP3) in the range of −5.2∼–13.5 dBm, good reverse isolation (better than −26 dB), 2.89–3.82 dB noise penalties, and 17.2–25.5 dB peak forward gain. In case of threestage front-ends built with CS, CC, and CG blocks (power rating 9.2–9.6 mW), forward gain and optimized noise figures are found as >33 dB and <3.26 dB, respectively. They achieve −2.5∼18.3 dBm IIP3, <−39 dB reverse isolation, and <−17 dB minimum IRL. The results are compared with reported simulated findings on CMOS multistage amplifiers to highlight their relative advantages in terms of power requirement and decibel(gain)-per-watt.

scholarly journals Design of Low Power Amplifier for Brain Signal Measurement Applications

2019 ◽  
Vol 8 (9) ◽  
pp. 686-688
Keyword(s):  
Low Power ◽  
Power Amplifier ◽  
Power Dissipation ◽  
High Gain ◽  
Instrumentation Amplifier ◽  
Slew Rate ◽  
Eeg Signals ◽  
Gain Bandwidth ◽  
Front End ◽  
Signal Measurement

This paper presents the idea of analog amplifier which amplifies the amplitude of the real time EEG signals. This amplifier is for the front end application in brain signal measurement applications. In this paper instrumentation amplifier has been used for the designing purpose. The parameters of the proposed amplifier have been analyzed in order to achieve better gain and less power dissipation. The parameters like voltage, slew rate, gain bandwidth product, and sizing of Mosfet have been analyzed to achieve high gain using Cadence Virtuoso Software.

scholarly journals Fully-Differential Opamp Design

2021 ◽  
Author(s):  
Elyes Balti
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Operational Amplifier ◽  
High Performance ◽  
Building Blocks ◽  
High Gain ◽  
Low Power Consumption ◽  
Fully Differential ◽  
The Core ◽  
Design Requirements

Operational amplifier is considered as the core of the analog building blocks. High performance opamp must exhibit high gain, wide bandwidth, low power consumption and rail-to-rail output swings. In this work, we propose to design a fully-differential opamp design to satisfy certain design requirements and specifications.

Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators

2020 ◽  
Vol 29 (14) ◽  
pp. 2050223
Author(s):  
Joydeep Basu ◽  
Pradip Mandal
Keyword(s):  
Continuous Time ◽  
High Gain ◽  
Design Guidelines ◽  
Operational Amplifiers ◽  
Switched Capacitor ◽  
Common Mode ◽  
Fully Differential ◽  
Op Amp ◽  
Dc Gain ◽  
Minimum Power Consumption

For stabilizing the common-mode output voltage of fully differential operational amplifiers, switched-capacitor (SC) type of common-mode feedback (CMFB) is a familiar technique. This is appropriate for implementing high-gain wide-swing low-power op-amps due to its benefits of minimum power consumption, superior linearity across a large amplifier output swing range, and improved feedback loop stability in comparison to continuous-time CMFB. However, the usage of SC-CMFB requires careful attention to some realistic aspects, details of many of which are available in literature. Nonetheless, its adverse effect on the op-amp’s differential-mode gain has not been investigated much. The explanation for this effect is the SC-CMFB-induced equivalent resistive loading, and this is particularly significant in amplifiers like folded cascode which are intended to provide a high gain. This issue of drop in op-amp dc gain because of SC-CMFB, and the consequence on the realization of continuous-time and discrete-time forms of integrators utilizing such amplifiers is the topic of discussion in this paper. Relevant analytical derivations and circuit simulations at the transistor level are provided. A couple of design guidelines and circuit topologies for minimizing the loading-induced gain reduction are also presented.

ADJOINT NETWORK THEOREM AND FLOATING ELEMENTS IN THE NAM

2009 ◽  
Vol 18 (03) ◽  
pp. 597-616 ◽  
Author(s):  
AHMED M. SOLIMAN
Keyword(s):  
Building Blocks ◽  
Current Conveyor ◽  
The Other ◽  
Current Mirror ◽  
Op Amp ◽  
Admittance Matrix ◽  
Floating Element

Although the adjoint network theorem preserves all the circuit properties it does not, however, guarantee that the floating property of an element is maintained. In other words, the adjoint of a floating element may not be floating and vice-versa a nonfloating element may have an adjoint floating element as will be explained in this paper. An important and new property of the Nodal Admittance Matrix (NAM) is that it can identify any element as a floating or nonfloating. The four floating basic building blocks including the nullor are tabulated. It is shown that the nullor and the Voltage Mirror (VM)–Current Mirror (CM) pair are self adjoint. The other two floating elements namely Nullator–CM pair and the VM–Norator pair are adjoint to each other. The NAM of the Op Amp family and Current Conveyor (CCII) family are also given. Two examples are given demonstrating the generation of two families of CCII filters from two known two-CCII filter circuits with demonstration of the floatation property in each of the two filters. Although the paper has a tutorial nature it also includes new important results.

Sign in / Sign up

Export Citation Format

Share Document