Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers

2016 ◽  
Vol 25 (10) ◽  
pp. 1650124 ◽  
Author(s):  
S. Rekha ◽  
T. Laxminidhi
Keyword(s):  
Power Supply ◽  
Continuous Time ◽  
Efficient Solution ◽  
Low Voltage ◽  
Cmos Technology ◽  
Common Mode ◽  
Power Efficient ◽  
Differential Amplifiers ◽  
Fully Differential ◽  
Simulation Results

Continuous time common mode feedback (CMFB) circuits for low voltage, low power applications are proposed. Four circuits are proposed for gate/bulk-driven pseudo-differential transconductors operating on sub-1-V power supply. The circuits are validated for a bulk-driven pseudo-differential transconductor operating on 0.5[Formula: see text]V in 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results reveal that the proposed CMFB circuits offer power efficient solution for setting the output common mode of the transconductors. They also load the transconductor capacitively offering capacitance of about 1[Formula: see text]fF to tens of femto farads.

scholarly journals Ultra‐low voltage, power efficient continuous‐time filters in 180 nm CMOS technology

2019 ◽  
Vol 13 (7) ◽  
pp. 988-997
Author(s):  
Rekha S. ◽  
Vasantha Moodabettu Harishchandra ◽  
Tonse Laxminidhi
Keyword(s):  
Continuous Time ◽  
Low Voltage ◽  
Cmos Technology ◽  
Power Efficient ◽  
Continuous Time Filters

scholarly journals Compact Continuous Time Common-Mode Feedback Circuit for Low-Power, Area-Constrained Neural Recording Amplifiers

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 145
Author(s):  
Joon Young Kwak ◽  
Sung-Yun Park
Keyword(s):  
Low Power ◽  
Continuous Time ◽  
Cmos Technology ◽  
Neural Recording ◽  
Low Noise ◽  
Common Mode ◽  
Passive Components ◽  
Fully Differential ◽  
Transconductance Amplifier ◽  
Differential Difference Amplifier

A continuous-time common-mode feedback (CMFB) circuit for low-power, area-constrained neural recording amplifiers is proposed. The proposed CMFB circuit is compact; it can be realized by simply replacing passive components with transistors in a low-noise folded cascode operational transconductance amplifier (FC-OTA) that is one of the most widely adopted OTAs for neural recording amplifiers. The proposed CMFB also consumes no additional power, i.e., no separate CMFB amplifier is required, thus, it fits well to low-power, area-constrained multichannel neural recording amplifiers. The proposed CMFB is analyzed in the implementation of a fully differential AC-coupled neural recording amplifier and compared with that of an identical neural recording amplifier using a conventional differential difference amplifier-based CMFB in 0.18 μm CMOS technology post-layout simulations. The AC-coupled neural recording amplifier with the proposed CMFB occupies ~37% less area and consumes ~11% smaller power, providing 2.67× larger output common mode (CM) range without CM bandwidth sacrifice in the comparison.

A 1V Low Voltage 4GHz Phase-Switching Dual-Modulus Prescaler in 0.18μm CMOS

2013 ◽  
Vol 364 ◽  
pp. 444-448
Author(s):  
Liang Yuan ◽  
Xiang Ning Fan
Keyword(s):  
Power Supply ◽  
Power Dissipation ◽  
Low Voltage ◽  
Cmos Technology ◽  
Driving Ability ◽  
Phase Switching ◽  
Voltage Phase ◽  
Low Threshold ◽  
Simulation Results ◽  
Circuit Techniques

A 1V low-voltage phase switching dual-modulus prescaler in standard 0.18μm TSMC RF CMOS technology is presented. Forward phase switching technique is used to prevent glitches. Low threshold voltage transistors are applied to overcome low voltage supply. Circuit techniques are used to improve driving ability and ensure reliability. The post simulation results show the prescaler operates correctly from 0.8GHz to 4GHz with power dissipation of 2.059mW at a maximum input frequency of 4GHz from 1V power supply.

scholarly journals Simple Scheme for the Implementation of Low Voltage Fully Differential Amplifiers without Output Common-Mode Feedback Network

2020 ◽  
Vol 10 (4) ◽  
pp. 34
Author(s):  
Mario Renteria-Pinon ◽  
Jaime Ramirez-Angulo ◽  
Alejandro Diaz-Sanchez
Keyword(s):  
Figure Of Merit ◽  
Low Voltage ◽  
Cmos Process ◽  
Large Signal ◽  
Simple Scheme ◽  
Common Mode ◽  
Differential Amplifiers ◽  
Fully Differential ◽  
Feedback Network ◽  
Strong Inversion

A simple scheme to implement class AB low-voltage fully differential amplifiers that do not require an output common-mode feedback network (CMFN) is introduced. It has a rail to rail output signal swing and high rejection of common-mode input signals. It operates in strong inversion with ±300 mV supplies in a 180 nm CMOS process. It uses an auxiliary amplifier that minimizes supply requirements by setting the op-amp input terminals very close to one of the rails and also serves as a common-mode feedback network to generate complementary output signals. The scheme is verified with simulation results of an amplifier that consumes 25 µW, has a gain-bandwidth product (GBW) of 16.1 MHz, slew rate (SR) of 8.4 V/µs, the small signal figure of merit (FOMSS) of 6.49 MHz*pF/µW, the large signal figure of merit (FOMLS) of 3.39 V/µs*pF/µW, and current efficiency (CE) of 2.03 in strong inversion, with a 10 pF load capacitance.

scholarly journals A Power Efficient Self Biased OTA Design Based on g_m/I_D Methodology with Considering Load Variation, Temperature Variation and Power Supply Variation

2018 ◽  
Vol 7 (2) ◽  
pp. 104
Author(s):  
Vikas Mittal
Keyword(s):  
Power Supply ◽  
High Frequency ◽  
Design Methodology ◽  
Cmos Technology ◽  
Temperature Variations ◽  
Power Efficient ◽  
Load Variations ◽  
Current Consumption ◽  
Rf Communication ◽  
Simulation Results

The present work addresses the design of power efficient fully self biased OTA using a design methodology based on the  transistor characteristics. This analog module was analyzed, designed and prototyped in TSMS 0.35μm CMOS technology. Simulation results are presented, in order to validate the methodology. The OTA has Gain of 41.35 dB and 3db bandwidth of 138.73 kHz and the UGB of 12.40MHz with the current consumption of 65.50 μA. The circuit does not have need of any DC external biasing circuit, only need to apply VDD (3.3 V). Here self biasing has been introduced with power consumption of 216.15μW. The results have been taken with load variations, temperature variations, and power supply variations. This circuit used in real time high frequency applications as in RF communication.

LOW POWER CONTINUOUS TIME COMMON MODE SENSING FOR COMMON MODE FEEDBACK CIRCUITS

2010 ◽  
Vol 19 (03) ◽  
pp. 519-528 ◽  
Author(s):  
M. PRAMOD ◽  
T. LAXMINIDHI
Keyword(s):  
Continuous Time ◽  
Input Impedance ◽  
Cmos Process ◽  
High Input ◽  
High Input Impedance ◽  
Common Mode ◽  
Standby Power ◽  
Low Distortion ◽  
Simulation Results ◽  
Feedback Circuits

Continuous common mode feedback (CMFB) circuits having high input impedance and low distortion are proposed. The proposed circuits are characterized for 0.18 μm CMOS process with 1.8 V supply. Simulation results indicate that the proposed common mode detector consumes no standby power and CMFB circuit consumes 27–34% less power than previous high swing CMFB circuits.

A 10T Cell Design without Half Select Problem for Bit-Interleaving Architecture in 65nm CMOS

2013 ◽  
Vol 373-375 ◽  
pp. 1607-1611
Author(s):  
Hong Gang Zhou ◽  
Shou Biao Tan ◽  
Qiang Song ◽  
Chun Yu Peng
Keyword(s):  
Error Correction ◽  
Low Voltage ◽  
Cmos Technology ◽  
Soft Error ◽  
Error Correction Codes ◽  
Cell Design ◽  
Low Voltage Operation ◽  
Sram Cell ◽  
Simulation Results ◽  
Nanometer Regime

With the scaling of process technologies into the nanometer regime, multiple-bit soft error problem becomes more serious. In order to improve the reliability and yield of SRAM, bit-interleaving architecture which integrated with error correction codes (ECC) is commonly used. However, this leads to the half select problem, which involves two aspects: the half select disturb and the additional power caused by half-selected cells. In this paper, we propose a new 10T cell to allow the bit-interleaving array while completely eliminating the half select problem, thus allowing low-power and low-voltage operation. In addition, the RSNM and WM of our proposed 10T cell are improved by 21% and nearly one times, respectively, as compared to the conventional 6T SRAM cell in SMIC 65nm CMOS technology. We also conduct a comparison with the conventional 6T cell about the leakage simulation results, which show 14% of leakage saving in the proposed 10T cell.

Fully Differential Class-AB OTA with Improved CMRR

2017 ◽  
Vol 26 (11) ◽  
pp. 1750169 ◽  
Author(s):  
Francesco Centurelli ◽  
Pietro Monsurrò ◽  
Gaetano Parisi ◽  
Pasquale Tommasino ◽  
Alessandro Trifiletti
Keyword(s):  
Cmos Technology ◽  
Current Mirror ◽  
Differential Mode ◽  
Common Mode ◽  
Common Mode Rejection Ratio ◽  
Class Ab ◽  
Fully Differential ◽  
Rejection Ratio ◽  
Mode Behavior ◽  
The Common

This paper presents a fully differential class-AB current mirror OTA that improves the common-mode behavior of a topology that presents very good differential-mode performance but poor common-mode rejection ratio (CMRR). The proposed solution requires a low-current auxiliary circuit driven by the input signal, to compensate the effect of the common-mode input component. Simulations in 40-nm CMOS technology show a net reduction of common-mode gain of more than 90[Formula: see text]dB without affecting the differential-mode behavior; a sample-and-hold amplifier exploiting the proposed amplifier has also been simulated.

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