scholarly journals A System-on-Chip Solution for a Low Power Active Capsule Endoscope with Therapeutic Capabilities for Clip Application in the Gastrointestinal Tract

2017 ◽  
Vol 02 (04) ◽  
pp. 1750005
Author(s):  
Oscar Alonso ◽  
Angel Diéguez ◽  
Sebastian Schostek ◽  
Marc O. Schurr
Keyword(s):  
Low Power ◽  
Integrated Circuit ◽  
System On Chip ◽  
Capsule Endoscope ◽  
Implementation Challenges ◽  
Clip Application ◽  
Application Specific Integrated Circuit ◽  
On Chip ◽  
Wireless Capsule ◽  
Application Specific

This paper addresses the circuit implementation challenges resulting from the integration of a therapeutic clip in a magnetically maneuverable wireless capsule intended for colonoscopy. To deal with the size constraints typical of a capsule endoscope, an Application Specific Integrated Circuit (ASIC) has been designed specifically to habilitate the release of the therapeutic clip. The ASIC is a complete System on Chip (SoC) that incorporates a circuit for the low power release of the clip, thus overcoming the limitations of the power supply system. With a size of 14[Formula: see text]mm2, the ASIC can be incorporated in practically any capsule endoscope, consuming only an idle-state power of 1.5[Formula: see text]mW.

Feasibility of the Microcomputers for the ADDASAT Capsule

2016 ◽  
Vol 841 ◽  
pp. 309-314
Author(s):  
Dragos Ronald Rugescu
Keyword(s):  
Integrated Circuit ◽  
System On Chip ◽  
Circuit Asic ◽  
Rf Communication ◽  
Size Constraints ◽  
Extreme Degree ◽  
The Future ◽  
Application Specific Integrated Circuit ◽  
On Chip ◽  
Application Specific

One of the most challenging problems in developing the astrionics of the recoverable orbital ADDAHORSE microcapsule is represented by the power and size constraints which require an extreme degree of miniaturization. The size, mass and power requirements of the electronic and computing (astrionics) on-board control and command equipment can be conveniently reduced by designing an Application Specific Integrated Circuit (ASIC) which integrates sensors, autopilot logic, drivers, RF communication and interface subsystems in a single, combined SoC (System-on-Chip). The feasibility of such a device is discussed here within the bounds of the ADDAHORSE project which was proposed for structural funding in Romania in 2014. This study was conducted by the Center for Innovation and Development in the Exploration of Space (CIDES) in the emerging Făgăraș facility of the future Făgăraș Space Center in Romania.

scholarly journals Simultaneous Voltage and Current Measurement Instrumentation Amplifier for ECG and PPG Monitoring

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 679
Author(s):  
Jongpal Kim
Keyword(s):  
Integrated Circuit ◽  
Cardiovascular Health ◽  
Current Noise ◽  
Instrumentation Amplifier ◽  
Current Sensing ◽  
Application Specific Integrated Circuit ◽  
Time Division ◽  
Electrocardiogram Ecg ◽  
First Time ◽  
Application Specific

An instrumentation amplifier (IA) capable of sensing both voltage and current at the same time has been introduced and applied to electrocardiogram (ECG) and photoplethysmogram (PPG) measurements for cardiovascular health monitoring applications. The proposed IA can switch between the voltage and current sensing configurations in a time–division manner faster than the ECG and PPG bandwidths. The application-specific integrated circuit (ASIC) of the proposed circuit design was implemented using 180 nm CMOS fabrication technology. Input-referred voltage noise and current noise were measured as 3.9 µVrms and 172 pArms, respectively, and power consumption was measured as 34.9 µA. In the current sensing configuration, a current noise reduction technique is applied, which was confirmed to be a 25 times improvement over the previous version. Using a single IA, ECG and PPG can be monitored in the form of separated ECG and PPG signals. In addition, for the first time, a merged ECG/PPG signal is acquired, which has features of both ECG and PPG peaks.

CONCEPTS OF ELECTRONICALLY-CONTROLLED ELECTROMECHANICAL/MECHANOELECTRICAL STEER-, AUTODRIVE- AND AUTOABSORBABLE WHEELS FOR ENVIRONMENTALLY-FRIENDLY TRI-MODE SUPERCARS

1994 ◽  
Vol 04 (04) ◽  
pp. 501-516 ◽  
Author(s):  
BOGDAN T. FIJALKOWSKI ◽  
JAN W. KROSNICKI
Keyword(s):  
Direct Current ◽  
Integrated Circuit ◽  
Environmentally Friendly ◽  
Alternating Current ◽  
Switching Frequency ◽  
Neuro Fuzzy ◽  
Interior Permanent Magnet ◽  
Application Specific Integrated Circuit ◽  
Computer Processor ◽  
Application Specific

Concepts of the electronically-controlled electromechanical/mechanoelectrical Steer-, Autodrive- and Autoabsorbable Wheels (SA2W) with their brushless Alternating Current-to-Alternating Current (AC-AC), Alternating Current-to-Direct Current-Alternating Current (AC-DC-AC) and/or Direct Current-to-Alternating Current (DC-AC)/Alternating Current-to-Direct Current (AC-DC) macroelectronic converter commutator (macro-commutator) wheel-hub motors/generators with the Application Specific Integrated Matrixer (ASIM) macroelectronic converter commutators (ASIM macrocommutators) and Application Specific Integrated Circuit (ASIC) microelectronic Neuro-Fuzzy (NF) computer (processor) controllers (ASIC NF microcontrollers) for environmentally-friendly tri-mode supercars (advanced ultralight hybrids) have been conceived by the first author and designed by both authors with the Cracow University of Technology’s Automotive Mechatronics Research and Development (R&D) Team. These electromechanical/mechanoelectrical wheel-hub motors/generators, respectively, for instance, can be composed of the outer rotor with the Interior Permanent Magnet (IPM) poles and the inner stator that has the three-phase armature winding. The macroelectronic converter commutator establishes the AC-AC cycloconverter, AC-DC rectifier-DC-AC inverter and/or DC-AC inverter/AC-DC rectifier ASIM macrocommutator. The microelectronic NF computer (processor) controller establishes the ASIC microcomputer-based NF microcontroller. By adopting continuous semiconductor bipolar electrical valves in the high-power ASIM, it has been able to increase the commutation (switching) frequency and reduce harmonic losses of the electromechanical/mechanoelectrical wheel-hub motors/generators, respectively.

scholarly journals Recent Advances in ASIC Development for Enhanced Performance M-Sequence UWB Systems

Sensors ◽  
2020 ◽  
Vol 20 (17) ◽  
pp. 4812 ◽  
Author(s):  
Pavol Galajda ◽  
Martin Pecovsky ◽  
Miroslav Sokol ◽  
Martin Kmec ◽  
Dusan Kocur
Keyword(s):  
Integrated Circuit ◽  
Short Range ◽  
Functional System ◽  
Ultra Wideband ◽  
Radar Sensors ◽  
Sensing Applications ◽  
Radio Detection ◽  
M Sequence ◽  
Application Specific Integrated Circuit ◽  
On Chip

Short-range ultra-wideband (UWB) radar sensors belong to very promising sensing techniques that have received vast attention recently. The M-sequence UWB sensing techniques for radio detection and ranging feature several advantages over the other short-range radars, inter alia superior integration capabilities. The prerequisite to investigate their capabilities in real scenarios is the existence of physically available hardware, i.e., particular functional system blocks. In this paper, we present three novel blocks of M-sequence UWB radars exploiting application-specific integrated circuit (ASIC) technology. These are the integrated 15th-order M-sequence radar transceiver on one chip, experimental active Electronic Communication Committee (ECC) bandpass filter, and miniature transmitting UWB antenna with an integrated amplifier. All these are custom designs intended for the enhancement of capabilities of an M-sequence-based system family for new UWB short-range sensing applications. The design approaches and verification of the manufactured prototypes by measurements of the realized circuits are presented in this paper. The fine balance on technology capabilities (Fc of roughly 120 GHz) and thoughtful design process of the proposed blocks is the first step toward remarkably minimized devices, e.g., as System on Chip designs, which apparently allow broadening the range of new applications.

scholarly journals Design of ASIC Square Calculator Using AncientVedic Mathematics

2018 ◽  
Vol 7 (2.23) ◽  
pp. 464
Author(s):  
Angshuman Khan ◽  
Sudip Halder ◽  
Shubhajit Pal
Keyword(s):  
Integrated Circuit ◽  
Software Tool ◽  
Logic Gates ◽  
Digital Logic ◽  
Simple Design ◽  
Innovative Design ◽  
Circuit Asic ◽  
Vedic Mathematics ◽  
Application Specific Integrated Circuit ◽  
Application Specific

This article includes a simple design of Vedic square calculator for Application Specific Integrated Circuit (ASIC). This is a straightforward and innovative design of Vedic calculator using only few basic digital logic gates. Among the all sutras and sub sutras of ancient Vedic mathematics, the sutra ‘Urdhva Tiryagbyham’ is used here for square calculation of two bits numbers which results in an effortless and faster method of square calculation than all the existing methods. The design and minimization of the circuit has been carried out to achieve a standard architecture that is the simplest too. Here Xilinx ISE software tool is used rigorously to simulate the architecture.  

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