Direct Characterization of Impact Ionization Current in Silicon-on-Insulator Body-Contacted MOSFETs

2015 ◽  
Vol 66 (5) ◽  
pp. 93-99 ◽  
Author(s):  
C. Marquez ◽  
N. Rodriguez ◽  
J. M. Montes ◽  
R. Ruiz ◽  
F. Gamiz ◽  
...  
2021 ◽  
Author(s):  
Deivakani M ◽  
Sumithra M.G ◽  
Anitha P ◽  
Jenopaul P ◽  
Priyesh P. Gandhi ◽  
...  

Abstract Semiconductor industry is still looking for the enhancement of breakdown voltage in Silicon on Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Thus, in this paper, heavy n-type doping below the channel is proposed for SOI MOSFET. Simulation of SOI MOSFET is carried out using 2D TCAD physical simulator. In the conventional device, with no p-type doping is used at the bottom silicon layer. While, in proposed device, p-type doping of 1×1018 cm-3 is used. Physical models are used in the simulation to achieve realistic performance. The models are mobility model, impact ionization model and ohmic contact model. Using TCAD simulation, electron/hole current density, impact generation, recombination and breakdown phenomena are analyzed. It is found that the proposed with p-type doping of 1×1018 cm-3 for SOI MOSFET yields high breakdown voltage. In contrast to conventional device, 20% improvement in breakdown voltage is achieved for proposed device.


Author(s):  
Mary Gopanchuk ◽  
Mohamed Arabi ◽  
N. Nelson-Fitzpatrick ◽  
Majed S. Al-Ghamdi ◽  
Eihab Abdel-Rahman ◽  
...  

This paper reports on the design, fabrication, and characterization of non-interdigitated comb drive actuators in Silicon-on-Insulator (SOI) wafers, using a single mask surface microma-chining process. The response of the actuator is analyzed numerically and experimentally. The results show at the fundamental frequency; it behaves as a longitudinal comb drive actuator. At a higher frequency, it exhibits a high-quality factor which is appropriate for sensor applications.


MRS Advances ◽  
2018 ◽  
Vol 3 (57-58) ◽  
pp. 3347-3357
Author(s):  
S. Dutta ◽  
T. Chavan ◽  
S. Shukla ◽  
V. Kumar ◽  
A. Shukla ◽  
...  

Abstract:Spiking Neural Networks propose to mimic nature’s way of recognizing patterns and making decisions in a fuzzy manner. To develop such networks in hardware, a highly manufacturable technology is required. We have proposed a silicon-based leaky integrate and fire (LIF) neuron, on a sufficiently matured 32 nm CMOS silicon-on-insulator (SOI) technology. The floating body effect of the partially depleted (PD) SOI transistor is used to store “holes” generated by impact ionization in the floating body, which performs the “integrate” function. Recombination or equivalent hole loss mimics the “leak” functions. The “hole” storage reduces the source barrier to increase the transistor current. Upon reaching a threshold current level, an external circuit records a “firing” event and resets the SOI MOSFET by draining all the stored holes. In terms of application, the neuron is able to show classification problems with reasonable accuracy. We looked at the effect of scaling experimentally. Channel length scaling reduces voltage for impact ionization and enables sharper impact ionization producing significant designability of the neuron. A circuit equivalence is also demonstrated to understand the dynamics qualitatively. Three distinct regimes are observed during integration based on different hole leakage mechanism.


2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000283-000288 ◽  
Author(s):  
B. Reese ◽  
R. Shaw ◽  
J. Hornberger ◽  
R. Schupbach ◽  
A. Lostetter

This paper discusses the development of a high temperature (i.e., 230 °C ambient) 100V–300V/15V 20W isolated power supply. The power supply is implemented using Silicon-Carbide (SiC) power switches, high-temperature silicon on insulator (HTSOI) control circuitry, as well as custom high temperature magnetics and packaging technology. The heart of this power supply is a custom-built PWM controller. The controller was built utilizing HTSOI component, which operate at temperatures as high as 300 °C. The developed power supply targets high ambient temperature environment applications and includes features such as housekeeping power supply, soft-start and under-voltage lockout. The power supply is packaged using a multi-chip module (MCM) packaging approach. A single layer power substrate and a multiple layer control substrate are used. Bare die devices are utilized to save space, reduce parasitic impedances, and increase temperature of operation and reliability. This paper provides details on the electrical and thermal design as well as fabrication and characterization of the power supply. Additionally, results of the full characterization of this power supply are provided; this includes temperature testing up to 230 °C, efficiency results, load transition behavior, output ripple, etc.


2013 ◽  
Vol 2013 (1) ◽  
pp. 000705-000710 ◽  
Author(s):  
Igor P. Prikhodko ◽  
Brenton R. Simon ◽  
Gunjana Sharma ◽  
Sergei A. Zotov ◽  
Alexander A. Trusov ◽  
...  

We report vacuum packaging procedures for low-stress die attachment and versatile hermetic sealing of resonant MEMS. The developed in-house infrastructure allows for both high and moderate-level vacuum packaging addressing the requirements of various applications. Prototypes of 100 μm silicon-on-insulator Quadruple Mass Gyroscopes (QMGs) were packaged using the developed process with and without getters. Characterization of stand-alone packaged devices with no getters resulted in stable quality factors (Q-factors) of 1000 (corresponding to 0.5 Torr vacuum level), while devices sealed with activated getters demonstrated Q-factors of 1.2 million (below 0.1 mTorr level inside the package). Due to the high Q-factors achieved in this work, we project that the QMG used in this work can potentially reach the navigation-grade performance, potentially bridging the gap between the inertial silicon MEMS and the state-of-the-art fused quartz hemispherical resonator gyroscopes.


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