scholarly journals The new approach minimizes harmonics in a single-phase three-level NPC 400 Hz converter for airplanes

Author(s):  
Do Ngoc Quy ◽  
Do Ba Phu ◽  
Nguyen Kien Trung

<span lang="EN-US">This paper provides a new approach to reducing high-order harmonics in 400 Hz inverter using a three-level neutral-point clamped (NPC) converter. A voltage control loop using the harmonic compensation combined with NPC clamping diode control technology. The capacitor voltage imbalance also causes harmonics in the output voltage. For 400 Hz inverter, maintain a balanced voltage between the two input (direct current) (DC) capacitors is difficult because the pulse width modulation (PWM) modulation frequency ratio is low compared to the frequency of the output voltage. A method of determining the current flowing into the capacitor to control the voltage on the two balanced capacitors to ensure fast response reversal is also given in this paper. The combination of a high-harmonic resonator controller and a neutral-point voltage controller working together on the 400 Hz NPC inverter structure is given in this paper.</span>

2021 ◽  
Author(s):  
Arifur Rahman Shohel

This project focuses on the topology of multilevel neutral point clamped (NPC)/H-bridge inverters and their modified modulation technique for high-power (megawatts) medium voltage (typically 6000 v) applications. A sinusodial pulse width in-phase disposition modulation is proposed for five-level NPC/H-bridge inverters. The inverter achieves good harmonic performance and low dv/dt in its output voltage waveforms in comparison to the conventional three-level NPC inverter. A seven-level NPC/H-bridge topology and its sinusodial pulse width in-phase disposition modulation are also proposed and investigated, which has better performance than the five-level inverters. Theoretical analysis and computer simulation are carried out for the proposed inverter topologies and algorithms. The output voltage waveforms and harmonic performance are verified by experiments on a five-level NPC/H-bridge inverters.


Author(s):  
Nhờ Văn NGUYỄN ◽  
HONG-PHONG NGUYEN LE

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.


Energies ◽  
2018 ◽  
Vol 11 (8) ◽  
pp. 2049 ◽  
Author(s):  
Xiaoshu Zan ◽  
Mingliang Cui ◽  
Dongsheng Yu ◽  
Ruidong Xu ◽  
Kai Ni

The Switched Reluctance Generator (SRG) is suitable for wind power generation due to its good reliability and robustness. However, The SRG system adopting the conventional control algorithm with Pulse Width Modulation (PWM) method has a drawback, low response speed. The pulse train (PT) control has been widely used in dc/dc power converters operating in the discontinuous conduction mode due to its advantages of simple implementation and fast response. In this paper, for the first time, the PT control method is modified and adopted for controlling the output voltage of SRG system in order to achieve fast response. The capacitor current on the output side is sampled and combined with the output voltage to select the pulse trains and the low frequency oscillation cased by PT can be suppressed by tuning the feedback coefficient of the capacitor current. Also, good performance can be guaranteed with a wide range of voltage regulations, fast response, and no overshoot. The experimental platform of an 8/6 SRG system is built, and the experimental results show that the PT control can be used for SRG system with good practicability.


2019 ◽  
Author(s):  
Le Wang ◽  
Devon Jakob ◽  
Haomin Wang ◽  
Alexis Apostolos ◽  
Marcos M. Pires ◽  
...  

<div>Infrared chemical microscopy through mechanical probing of light-matter interactions by atomic force microscopy (AFM) bypasses the diffraction limit. One increasingly popular technique is photo-induced force microscopy (PiFM), which utilizes the mechanical heterodyne signal detection between cantilever mechanical resonant oscillations and the photo induced force from light-matter interaction. So far, photo induced force microscopy has been operated in only one heterodyne configuration. In this article, we generalize heterodyne configurations of photoinduced force microscopy by introducing two new schemes: harmonic heterodyne detection and sequential heterodyne detection. In harmonic heterodyne detection, the laser repetition rate matches integer fractions of the difference between the two mechanical resonant modes of the AFM cantilever. The high harmonic of the beating from the photothermal expansion mixes with the AFM cantilever oscillation to provide PiFM signal. In sequential heterodyne detection, the combination of the repetition rate of laser pulses and polarization modulation frequency matches the difference between two AFM mechanical modes, leading to detectable PiFM signals. These two generalized heterodyne configurations for photo induced force microscopy deliver new avenues for chemical imaging and broadband spectroscopy at ~10 nm spatial resolution. They are suitable for a wide range of heterogeneous materials across various disciplines: from structured polymer film, polaritonic boron nitride materials, to isolated bacterial peptidoglycan cell walls. The generalized heterodyne configurations introduce flexibility for the implementation of PiFM and related tapping mode AFM-IR, and provide possibilities for additional modulation channel in PiFM for targeted signal extraction with nanoscale spatial resolution.</div>


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 466
Author(s):  
Pawel Szczepankowski ◽  
Natalia Strzelecka ◽  
Enrique Romero-Cadaval

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
M. Jagabar Sathik ◽  
Dhafer J. Almakhles ◽  
N. Sandeep ◽  
Marif Daula Siddique

AbstractMultilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter’s effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.


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