The Investigation of Fluorine Effects on Charge Trapping and Interface State Generation in Mos Structures

1991 ◽  
Vol 219 ◽  
Author(s):  
Dunxian D. Xie ◽  
Ta-Cheng Lin ◽  
Donald R. Young
Keyword(s):  
Charge Trapping ◽  
Interface State ◽  
Flat Band ◽  
Physical Damage ◽  
Mos Devices ◽  
Interface Charge ◽  
State Generation ◽  
Fluorinated Oxides ◽  
Donor States ◽  
Mos Structures

ABSTRACTThe bulk and interface charge trapping phenomena of fluorinated oxides have been studied by various electronic measurements. Fluorine is introduced into dry oxides by low energy (25kev) implantation followed by a 1000°C N2 ambient anneal to remove physical damage. Both the flat band and the mid gap voltage shifts of such MOS devices are measured during avalanche electron injection. We have developed techniques to separate effects due to interface state generation from bulk trapping effects. The bulk electron traps in the fluorinated oxides have a different cross section from the known water-related traps in conventional oxides. The generation of fast and slow interface states for different dosages of fluorine implantation is discussed based on Q-V and C-V measurements. The fast interface donor states, generated during avalanche injection, are charged at flat band but discharged at mid gap and beyond. An optimum dosage of fluorine implantation is found to suppress the so called turn-around effect during avalanche injection due to the formation of slow donor states. Finally, injection under high temperature (120°C-150°C) anneals out most of these donor states.

Characterization of Diverse Gate Oxides on 4H-SiC 3D Trench-MOS Structures

2013 ◽  
Vol 740-742 ◽  
pp. 691-694 ◽  
Author(s):  
Christian T. Banzhaf ◽  
Michael Grieb ◽  
Achim Trautmann ◽  
Anton J. Bauer ◽  
Lothar Frey
Keyword(s):  
Silicon Dioxide ◽  
Dielectric Breakdown ◽  
Interface State ◽  
Oxide Semiconductor ◽  
Breakdown Field ◽  
Flat Band ◽  
Mos Devices ◽  
State Densities ◽  
Mos Structures

This study focuses on the characterization of silicon dioxide (SiO2) layers, either thermally grown or deposited on trenched 100 mm 4H-silicon carbide (SiC) wafers. We evaluate the electrical properties of silicon dioxide as a gate oxide (GOX) for 3D metal oxide semiconductor (MOS) devices, such as Trench-MOSFETs. Interface state densities (DIT) of 1*1011cm-2eV-1under flat band conditions were determined using the hi-lo CV-method [1]. Furthermore, current-electric field strength (IE) measurements have been performed and are discussed. Trench-MOS structures exhibited dielectric breakdown field strengths up to 10 MV/cm.

Charge trapping and interface state generation in 6H-SiC MOS structures

1995 ◽  
Vol 28 (1-4) ◽  
pp. 197-200 ◽  
Author(s):  
V.V. Afanas'ev ◽  
M. Bassler ◽  
G. Pensl ◽  
M.J. Schulz
Keyword(s):  
Charge Trapping ◽  
Interface State ◽  
State Generation ◽  
Mos Structures

Rapid Thermal Oxidation of Lightly Doped Silicon in N2O

1994 ◽  
Vol 342 ◽  
Author(s):  
S.C. Sun ◽  
L.S. Wang ◽  
F.L. Yeh ◽  
T.S. Lai ◽  
Y.H. Lin
Keyword(s):  
Growth Rate ◽  
Thermal Oxidation ◽  
Charge Trapping ◽  
Interface State ◽  
Constant Current ◽  
Mos Capacitor ◽  
Rapid Thermal Oxidation ◽  
Doped Silicon ◽  
State Generation ◽  
First Time

ABSTRACTIn this paper, a detailed study is presented for the growth kinetics of rapid thermal oxidation of lightly-doped silicon in N2O and O2 on (100), (110), and (111) oriented substrates. It was found that (110)-oriented Si has the highest growth rate in both N2O and dry O2, and (100) Si has the lowest rate. There is no “crossover” on the growth rate of rapid thermal N2O oxidation between (110) Si and (111) Si as compared to oxides grown in furnace N2O. Pressure dependence of rapid thermal N2O oxidation is reported for the first time. MOS capacitor results show that the low-pressure (40 Torr) N2O-grown oxides have much less interface state generation and charge trapping under constant current stress as compared to oxides grown in either 760 Torr N2O or O2 ambient.

Ultrathin Gate Dielectric Growth at Reduced Pressure

1994 ◽  
Vol 342 ◽  
Author(s):  
Robert McIntosh ◽  
Carl Galewski ◽  
John Grant
Keyword(s):  
Gate Dielectric ◽  
Charge Trapping ◽  
Cmos Technology ◽  
Interface State ◽  
Constant Current ◽  
Reduced Pressure ◽  
Current Stress ◽  
Ultrathin Oxides ◽  
State Generation ◽  
Improved Characteristics

The Growth of ultrathin oxides in N2O ambient has been a subject of extensive research for submicron CMOS technology. Oxides grown in N2O tend to have a higher charge-to-breakdown, less charge trapping under constant current stress, and less interface state generation under current stress and radiation than conventional oxides grown in oxygen [1,2]. In addition the penetration of boron through N2O oxides is significantly less than through conventional thermal oxides [3]. The improved characteristics of N2O are due to an interfacial pileup of nitrogen atoms [1-3]. Thus the growth of thermal oxides in N2O provides a method for obtaining many of the more favorable aspects of reoxidized-nitrided silicon dioxides, with a much simpler process.

High Quality Ultrathin Gate Dielectrics Prepared by In-Situ RTP

1995 ◽  
Vol 387 ◽  
Author(s):  
L. K. Han ◽  
M. Bhat ◽  
J. Yan ◽  
D. Wristers ◽  
D. L. Kwong
Keyword(s):  
Gate Dielectric ◽  
Defect Density ◽  
Gate Dielectrics ◽  
Charge Trapping ◽  
Interface State ◽  
High Quality ◽  
Hot Carrier ◽  
Thermal Oxide ◽  
State Generation

AbstractThis paper reports on the formation of high quality ultrathin oxynitride gate dielectric by in-situ rapid thermal multiprocessing. Four such gate dielectrics are discussed here; (i) in-situ NO-annealed SiO2, (ii) N2O- or NO- or O2-grown bottom oxide/RTCVD SiO2/thermal oxide, (iii) N2O-grown bottom oxide/Si3N4/N2O-oxide (ONO) and (iv) N2O-grown bottom oxide/RTCVD SiO2/N2O-oxide. Results show that capacitors with NO-based oxynitride gate dielectrics, stacked oxynitride gate dielectrics with varying quality of bottom oxide (O2/N2O/NO), and the ONO structures show high endurance to interface degradation, low defect-density and high charge-to-breakdown compared to thermal oxide. The N2O-last reoxidation step used in the stacked dielectrics and ONO structures is seen to suppress charge trapping and interface state generation under Fowler-Nordheim injection. The stacked oxynitride gate dielectrics also show excellent MOSFET performance in terms of transconductance and mobility. While the current drivability and mobilities are found to be comparable to thermal oxide for N-channel MOSFET's, the hot-carrier immunity of N-channel MOSFET's with the N2O-oxide/CVD-SiO2/N2O-oxide gate dielectrics is found to be significantly enhanced over that of conventional thermal oxide.

Effect of Growth Conditions on the Reliability of Ultrathin MOS Gate Oxides

1996 ◽  
Vol 428 ◽  
Author(s):  
Tien-Chun Yang ◽  
Krishna C. Saraswat
Keyword(s):  
Gate Oxide ◽  
Interface State ◽  
Growth Conditions ◽  
Physical Stress ◽  
Constant Current ◽  
Strong Function ◽  
Oxidation Rates ◽  
Mos Devices ◽  
State Generation ◽  
Mos Gate

AbstractIn this work we demonstrate that in MOS devices the reliability of ultrathin (< 100Å) gate oxide is a strong function of growth conditions, such as, temperature and the growth rate. In addition, for constant current gate injection the degradation of SiO2 is enhanced as the thickness is reduced. We attribute this to physical stress in SiO2 resulting from the growth process. The degradation is always more for those growth conditions which result in higher physical stress in SiO2. Higher temperatures and slower oxidation rates allow stress relaxation through viscous flow and hence result in SiO2 of better reliability. We also found that for constant current stressing, the interface damage is more at the collecting electrode than at the injecting electrode. ΔDit (stress induced interface state generation) can be reduced after a high temperature Ar post anneal after the gate oxide growth.

Radiation-Induced Interface-State Generation in MOS Devices

1986 ◽  
Vol 33 (6) ◽  
pp. 1177-1184 ◽  
Author(s):  
J. R. Schwank ◽  
P. S. Winokur ◽  
F. W. Sexton ◽  
D. M. Fleetwood ◽  
J. H. Perry ◽  
...  
Keyword(s):  
Interface State ◽  
Mos Devices ◽  
State Generation ◽  
Radiation Induced

Electrical Characterization of High-k Dielectrics by Means of Flat-Band Voltage Transient Recording

2007 ◽  
Vol 996 ◽  
Author(s):  
Salvador Duenas ◽  
Helena Castán ◽  
Héctor García ◽  
Luis Bailón ◽  
Kaupo Kukli ◽  
...  
Keyword(s):  
Electric Fields ◽  
Electrical Characterization ◽  
Charge Trapping ◽  
Atomic Layer ◽  
Localized States ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Flat Band Voltage ◽  
High K ◽  
Mos Structures

AbstractWe have carried out a comparison between flat-band transients displayed in metal-oxide-semiconductor (MOS) structures fabricated on several atomic layer deposited (ALD) high-k dielectric films: HfO2, ZrO2, Al2O3, Ta2O5, TiO2, and Gd2O3. The gate voltage as a function of time is recorded while keeping constant the capacitance at the initial flat band condition (CFB). Since samples are in darkness, under no electric fields and no charge-injection conditions, transients must be due to charge trapping of localized states produced by electrons (holes) coming from the semiconductor by tunnelling. The process is assisted by phonons and it is therefore thermally activated. The temperature-transient amplitude relation follows an Arrhenius plot which provides the thermal activation energy of soft-optical phonons. Finally, we describe the dependencies of the flat-band voltage on the setup bias history (accumulation or inversion) and the hysteresis sign (clockwise or counter-clockwise) of the capacitance-voltage (C-V) characteristics of MOS structures.

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