Improvement of Grain-Growth and Surface Roughness in Laser-Crystallized Polycrystalline Silicon Films

1997 ◽  
Vol 472 ◽  
Author(s):  
H.-S. Choi ◽  
C.-M. Park ◽  
J.-H. Jeon ◽  
B.-H. Min ◽  
M.-K. Han
Keyword(s):  
Surface Roughness ◽  
Grain Growth ◽  
Polycrystalline Silicon ◽  
Treatment Time ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Solidification Process ◽  
Laser Crystallization ◽  
Sem Images ◽  
Radical Treatment

ABSTRACTThe effects of nitrogen-radical treated amorphous silicon (a-Si) films on laser-crystallization behavior have been studied for the improvement of the grain-growth and the surface roughness. The radical treatments were performed by the rf (13.56 MHz) plasma-enhanced-chemical-vapor-deposition (PECVD) system with N2 gas before the laser-crystallization. The grain-size of the laser-crystallized polycrystalline silicon (poly-Si) film with 600 seconds of radical-treatment time was remarkably increased by the relaxation of solidification process caused by the possible evolution of solid phase SiNx compounds which shows the low thermal conductivity. The electrical conductivity at 30 °C was rather lager value of 3×10-5 Ω-1cm-1 than 1×10-5 Ω-1cm-1 of poly-Si without radical treatment, while the highly resistive SiNx compounds were formed. From the SEM images, the surface roughness was also improved by the selective etching of the 5%-water-diluted hydrofluoric (HF) acid on the grain boundaries which the SiNx compounds were well segregated into during the laser-crystallization.

scholarly journals Characterization of Defects and Stress in Polycrystalline Silicon Thin Films on Glass Substrates by Raman Microscopy

2011 ◽  
Vol 2011 ◽  
pp. 1-14 ◽  
Author(s):  
Kuninori Kitahara ◽  
Toshitomo Ishii ◽  
Junki Suzuki ◽  
Takuro Bessyo ◽  
Naoki Watanabe
Keyword(s):  
Grain Boundaries ◽  
Polycrystalline Silicon ◽  
Solid Phase ◽  
Raman Microscopy ◽  
Laser Crystallization ◽  
Local Vibration ◽  
Optical Phonon Mode ◽  
Glass Substrates ◽  
Silicon Thin Films ◽  
Si Films

Raman microscopy was applied to characterize polycrystalline silicon (poly-Si) on glass substrates for application as thin-film transistors (TFTs) integrated on electronic display panels. This study examines the crystallographic defects and stress in poly-Si films grown by industrial techniques: solid phase crystallization and excimer laser crystallization (ELC). To distinguish the effects of defects and stress on the optical-phonon mode of the Si–Si bond, a semiempirical analysis was performed. The analysis was compared with defect images obtained through electron microscopy and atomic force microscopy. It was found that the Raman intensity for the ELC film is remarkably enhanced by the hillocks and ridges located around grain boundaries, which indicates that Raman spectra mainly reflect the situation around grain boundaries. A combination of the hydrogenation of films and the observation of the Si-hydrogen local-vibration mode is useful to support the analysis on the defects. Raman microscopy is also effective for detecting the plasma-induced damage suffered during device processing and characterizing the performance of Si layer in TFTs.

Critical Technologies for Poly-Si TFT in High Resolution AM-LCD

1997 ◽  
Vol 471 ◽  
Author(s):  
I-Wei Wu
Keyword(s):  
Polycrystalline Silicon ◽  
Gate Dielectric ◽  
Solid Phase ◽  
Silicon Layer ◽  
Laser Crystallization ◽  
Switching Element ◽  
Dielectric Thickness ◽  
Aperture Ratio ◽  
Layer Deposition ◽  
Critical Issues

ABSTRACTPolycrystalline silicon (p-Si) TFT offers higher aperture ratio with integrated driver circuits compared to the conventional a-Si TFT in AM-LCD application. The advantages of the p-Si TFT as the pixel switching element will be more pronounced for AM-LCDs with large number of scan lines and/or high pixel density. This paper reviews challenges and issues associated with the technology of p-Si TFT, particularly in active silicon layer deposition, solid phase and laser crystallization, hydrogenation, leakage current, performance of different device architectures and reliability. Critical issues affecting the p-Si TFT AMLCD pixel design are analyzed, including: lithographic resolution and overlay accuracy, pixel density and aspect ratio, display format, storage to LC capacitance ratio, and gate dielectric thickness. Predictions on the regimes of dominance for different flat-panel technologies by advantages in performance and-or cost with respect to panel size and pixel density will be presented.

Hot-Wire Chemical Vapor Deposition for Epitaxial Silicon Growth On Large-Grained Polycrystalline Silicon Templates

2003 ◽  
Vol 762 ◽  
Author(s):  
M. S. Mason ◽  
C.M. Chen ◽  
H.A. Atwater
Keyword(s):  
Epitaxial Growth ◽  
Polycrystalline Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Growth Conditions ◽  
Solid Phase Epitaxy ◽  
Epitaxial Silicon ◽  
Hot Wire ◽  
Transmission Electron ◽  
Silicon Growth

AbstractWe investigate low-temperature epitaxial growth of thin silicon films on Si [100] substrates and polycrystalline template layers formed by selective nucleation and solid phase epitaxy (SNSPE). We have grown 300 nm thick epitaxial layers at 300°C on silicon [100] substrates using a high H2:SiH4 ratio of 70:1. Transmission electron microscopy confirms that the films are epitaxial with a periodic array of stacking faults and are highly twinned after approximately 240 nm of growth. Evidence is also presented for epitaxial growth on polycrystalline SNSPE templates under the same growth conditions.

Structural and Electrical Properties of Molecular Beam Deposited Polycrystalline Silicon

1987 ◽  
Vol 106 ◽  
Author(s):  
Sylvain L. Delage ◽  
S.-J. Jeng ◽  
D. Jousse ◽  
S. S. Iyer
Keyword(s):  
Electrical Properties ◽  
Amorphous Silicon ◽  
Polycrystalline Silicon ◽  
Molecular Beam ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Silicon Substrates ◽  
Low Resistivity ◽  
Structural And Electrical Properties ◽  
Polycrystalline Silicon Films

ABSTRACTThe structural and electrical properties have been investigated of antimony doped polycrystalline silicon films obtained by molecular beam deposition on oxidized silicon substrates. We show that low resistivity films with smooth morphology are obtained by Solid Phase Crystallization of antimony doped amorphous silicon layers deposited at 250°C. A resistivity of 4.3 mΩ cm is obtained by crystallizing the films at temperatures as low as 650°C for 15 minutes. Similar resistivities are typically obtained by Chemical Vapor Deposition at temperature of at least 850 °C. In-situ crystallization of the amorphous silicon is needed to obtain low resistivity polysilicon. We also show that direct deposition above 650 ° C gives rise to polycrystalline silicon with much higher resistivities.

Uniform, High Performance Poly-Si TFTs Fabricated by Laser- Crystallization of PECVD-Grown a-SI:H

2000 ◽  
Vol 621 ◽  
Author(s):  
D. Toet ◽  
T.W. Sigmon ◽  
T. Takehara ◽  
C.C. Tsai ◽  
W.R. Harshbarger
Keyword(s):  
Vapor Deposition ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Chemical Vapor ◽  
Laser Crystallization ◽  
Silicon Thin Film ◽  
Partial Melt ◽  
Amorphous Si ◽  
Average Size ◽  
Si Films

ABSTRACTPolycrystalline silicon thin film transistors (TFTs) were fabricated using laser crystallization of thin amorphous Si films grown by plasma-enhanced chemical vapor deposition. The films were exposed to a scanned XeCl excimer laser beam at 350 mJ/cm2. At this fluence the Si film com- pletely melted and crystallized in the form of uniformly distributed grains with an average size of 39 nm. One of the films was then subjected to a low fluence laser scan (250 mJ/cm2), which re- sulted in the melting of the top part of the film and lead to an increase in grain size. The TFTs fabricated without the partial melt method had good electrical properties and uniformities. The partial melt method lead to substantial improvements in most device characteristics, while the uniformity remained good.

Effects of Germanium on Grain size and surface roughness of the solid phase crystallized polycrystalline Si1−xGex films

1996 ◽  
Vol 424 ◽  
Author(s):  
Jin-Won Kim ◽  
Myung-Kwan Ryu ◽  
Tae-Hoon Kim ◽  
Ki-Bum Kim ◽  
Sang-Joo Kim
Keyword(s):  
Activation Energy ◽  
Surface Roughness ◽  
Grain Size ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Germanium Content ◽  
Capping Layer ◽  
Before And After ◽  
Pressure Chemical ◽  
The Difference

AbstractSi1−xGex (x≤0.5) films were deposited by using Si2H4 and GeH4 source gases in a low pressure chemical vapor deposition (LPCVD). The deposition temperature was varied from 375 °C for Si0.5Ge0.5 to 450 °C for Si film in order to deposit amorphous Si1−xGex films and the deposition pressure was about 1 Torr. The grain size of polycrystalline Si1−xGex films made by solid phase crystallization (SPC) decreases with germanium content in the films, and the activation energy obtained from the dependence of grain size on annealing temperature was 0.4 eV for Si and 0.45 eV for Si0 69Ge0.31. From obtaining a similar activation energy irrespective of Ge content in the film, the decrease of grain size with germanium content is attributed to the difference of the asdeposited film conditions. The surface roughness of Si1−xGex films investigated by atomic force microscope (AFM) increases with germanium content in the film before and after SPC. For instance, the root-mean square (rms) values of the surface roughness of the as-deposited Si and Si0.5Ge0.5 films were 2.3 and 17 Å, while those values were increased to 2.6 and 41 Å, respectively, after SPC. In order to reduce the surface roughness of Si0.5Ge0.5 film, we have deposited a thin Si capping layer on top of the Si1−xGex layer and identified that this capping layer effectively reduces the increase of surface roughness after SPC.

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