In today's world, electronics need to be as small as possible. This is especially true for a wide range of electronics from UAV controllers, cellphones, to implantable medical devices. One approach to achieving small system size is the System in Package (SIP). This approach incorporates a complete system (processor, memory, etc) into one small package. On the SIP, packaged parts are replaced by dies directly mounted to the substrate via flip-chip or wire-bond technology. SIP allows the designer flexibility to create a small system with only functionality that is required. A designer can pick and choose what parts are needed for a design and is not limited to the functionality of a single signal chip.
Since the first level part packaging is eliminated, the overall board size decreased leading to an overall reduction in area and weight. Not only is there a reduction in size of each packaged part, but routing area is also reduced. The line widths and spacings can be reduced along with via size.
The system used in the case study is a typical system with a FPGA, flash memory, DDR3 memory, ADC, DAC, voltage monitors, power supply monitor and control. The design is a complete system capable of processing analog sensor data, recording the data in external memory and controlling analog outputs. Such a system can be used for data collection, vehicle control, data processing, etc.
In terms of signal integrity, the SIP offers many advantages over a traditional PWB. Given the small nature of overall package generally means shorter routes. A shorter route has the advantage of a reduced propagation delay. Also, a shorter trace will have a lower insertion loss and improved return loss. Many parts require data busses signals to match in length. This is very important for DDR3 memory. A mismatch in trace length will cause skew between the data signals and the data strobe. On a smaller board, there is an overall improvement for matching signal traces.
Power distribution is another area of improvement for the SIP. A smaller board size means the board resonances will be shifted higher in frequency, alleviating possible power rail noise issues. Overall, the power planes are less lossy. Also, decoupling capacitors will be placed closer to the active components reducing the inductive path from the active device and the capacitor. This will allow decoupling for parts switching at fast rates. Given the shorter distances between transceivers within the system, the drive strength can be reduced. Decreased drive strength will reduce the amount of power dissipated by the transceiver.
This presentation details a case study for a system in package design. A comparison will be made between the system laid out on a traditional printed wiring board (PWB) and the same system laid out on a substrate (SIP). Comparisons of the area, weight, route-ability and signal integrity will be made.
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