scholarly journals Optical Properties of Porous Silicon Solar Cells for Use in Transport

2019 ◽  
Vol 21 (3) ◽  
pp. 53-58
Author(s):  
Martin Kralik ◽  
Michaela Hola ◽  
Stanislav Jurecka
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Spectral Reflectance ◽  
High Efficiency ◽  
Electrochemical Etching ◽  
Electrical Potential ◽  
Etching Time ◽  
Si Substrate ◽  
Etching Parameters ◽  
P Type

Porous silicon (pSi) samples were prepared by electrochemical etching of p-type silicon (p-type Si) substrate. Three pSi samples with different parameters of electrochemical etching (electrical potential, etching time, etching current) were prepared and analyzed. We studied the influence of electrochemical etching parameters on spectral reflectance of pSi structure. A modification of interference pattern was observed due to changes of microstructure. We determined the thickness of pSi layers from spectral reflectance. Solar cells with a porous structure achieve high efficiency and long life. These solar cells are predestined for use in transport.

Influence of Etching Time on Surface Structural Properties of p- and n- Type Porous Silicon Nanostructures by Photo-Electrochemical Anodic Etching

2012 ◽  
Vol 576 ◽  
pp. 511-515
Author(s):  
N.A. Asli ◽  
Maslihan Ain Zubaidah ◽  
S.F.M. Yusop ◽  
Khairunnadim Ahmad Sekak ◽  
Mohammad Rusop ◽  
...  
Keyword(s):  
Porous Silicon ◽  
Crystalline Silicon ◽  
Surface Characteristic ◽  
Electrochemical Anodization ◽  
Silicon Nanostructures ◽  
Etching Time ◽  
Force Microscopy ◽  
Etching Parameters ◽  
P Type ◽  
Substrate Doping

Porous silicon nanostructures (PSiN) are nanoporous materials which consist of uniform network of interconnected pore. The structure of PSiN is depending on etching parameters, including current density, HF electrolyte concentration, substrate doping type and level. In this work, the results of a structural p-type and n-type of porous silicon nanostructures were investigated by Field Emission Scanning Electron Microscopy (FESEM) and Atomic Force Microscopy (AFM) is reported. Samples were prepared by photo-electrochemical anodization of p- and n-type crystalline silicon in HF electrolyte at different etching time. The surface morphology of PSiN was studied by FESEM with same magnification shown n-type surface form crack faster than p-type of PSiN. While the topography and roughness of PSiN was characterize by AFM. From topography shown the different etching time for both type PSiN produce different porosity and roughness respectively. There is good agreement between p- and n-type have different in terms of surface characteristic.

Effects of Electrochemical Etching Time on the Performance of Porous Silicon Solar Cells on Crystalline n-Type (100) and (111)

2017 ◽  
Vol 46 ◽  
pp. 45-56 ◽  
Author(s):  
Khalid Omar ◽  
Khaldun A. Salman
Keyword(s):  
Solar Cells ◽  
Porous Silicon ◽  
Crystalline Silicon ◽  
Electrochemical Etching ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Silicon Solar Cells ◽  
Etching Time ◽  
Crystalline Silicon Solar Cells ◽  
Coating Layers

Electrochemical etching was carried out to produce porous silicon based on crystalline silicon n-type (100) and (111) wafers. Etching times of 10, 20, and 30 min were applied. Porous silicon layer was used as anti-reflection coating on crystalline silicon solar cells. The optimal etching time is 20 min for preparing porous silicon layers based on crystalline silicon n-type (100) and (111) wafers. Nanopores with high porosity were produced on the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers with average diameters of 5.7 and 5.8 nm, respectively. Average crystallite sizes for the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers were 20.57 and 17.45 nm at 20 and 30 min, respectively, due to the increase in broadening of the full width at half maximum. Photoluminescence peaks for porous silicon layers based on crystalline silicon n-type (100) and (111) wafers increased with growing porosity and a great blue shift in luminescence. The minimum effective coefficient of reflection was obtained from porous silicon layers based on the crystalline silicon n-type (100) wafer compared with n-type (111) wafer and as-grown at different etching times. Porous silicon layers based on the crystalline silicon n-type (100) wafer at 20 min etching time exhibited excellent light trapping at wavelengths ranging from 400 to 1000 nm. Thus, fabricated crystalline silicon solar cells based on porous silicon (100) anti-reflection coating layers achieved the highest efficiency at 15.50% compared to porous silicon (111) anti-reflection coating layers. The efficiency is characterized applying I-V characterization system under 100 mW/cm2 illumination conditions.

scholarly journals Thickness and tensile stress determination of black silicon layers by spectral reflectance and Raman scattering

2019 ◽  
Vol 70 (7) ◽  
pp. 51-57
Author(s):  
Martin Králik ◽  
Stanislav Jurečka ◽  
Emil Pinčík
Keyword(s):  
Tensile Stress ◽  
Raman Scattering ◽  
Spectral Reflectance ◽  
Electrochemical Etching ◽  
Electrical Potential ◽  
Etching Time ◽  
Black Silicon ◽  
Scattering Method ◽  
Scattering Spectra ◽  
Raman Scattering Spectra

Abstract In this work black silicon (b-Si) samples were prepared by anodic (electrochemical) etching of p-type silicon substrate in solution of hydrofluoric acid (HF). We studied influence of anodic etching conditions (etching time, electrical potential and current) on the spectral reflectance and Raman scattering spectra. Optical properties of b-Si structures were experimentally studied by UV-VIS (AvaSpec-2048) and Raman (Thermo DXR Raman) spectrometers. B-Si layer thickness of formed substrate were determined by using SCOUT software. Effective medium approximation theory (Looyenga) was used in construction of the reflectance model. Influence of the deformation of crystal lattice introduced during the substrate etching was studied by Raman scattering method. Teoretical model of the 1st order Raman scattering profile was constructed by using pseudo-Voigt function and the profile parameters were extracted. The values of biaxial tensile stress were estimated by using optimized Raman profile parameters.

Structural and Morphological Properties of Nano Photonic Silicon Structure for Photonics Applications

2020 ◽  
Vol 398 ◽  
pp. 29-33 ◽  
Author(s):  
Mariam M. Hassan ◽  
Makram A. Fakhri ◽  
Salah Aldeen Adnan
Keyword(s):  
Porous Silicon ◽  
Surface Morphology ◽  
Pore Diameter ◽  
Electrochemical Etching ◽  
Morphological Properties ◽  
Etching Time ◽  
Silicon Structure ◽  
Si Substrate ◽  
Etching Technique ◽  
Structure Surface

Porous silicon (n-PS) with diverse morphologies was prepared on silicon (Si) substrate via photo-electrochemical etching technique. We studies the structure, surface morphology, pore diameter, roughness, based on (XRD), (AFM), (SEM) at different etching time (5, 10 min) and current (10mA/cm2).

Influence of Electrochemical Etching Parameters on Morphology of Porous Silicon

2014 ◽  
Vol 1055 ◽  
pp. 68-72 ◽  
Author(s):  
Lan Liu ◽  
Yan Xue ◽  
Xiao Ming Ren ◽  
Rui Zhen Xie
Keyword(s):  
Porous Silicon ◽  
Specific Surface ◽  
Surface Area ◽  
Specific Surface Area ◽  
High Speed ◽  
Electrochemical Etching ◽  
Etching Time ◽  
Adsorption Surface ◽  
Etching Parameters ◽  
And Control

In order to protect porous silicon from break and enhance it’s porosity and specific surface area, porous silicon is prepared with electrochemical etching method. The charateristic of porous silicon is investigated with SEM and high-speed adsorption surface area and porosity analyzer. The results show that the porous silicon prepared with the method of gradient etching and control of etching time is mechanically stable. The porosity and specfic surface area are improved.

scholarly journals Responsivity of porous silicon for blue visible light with high sensitivity

2018 ◽  
Vol 16 (37) ◽  
pp. 98-107 ◽  
Author(s):  
Iftikhar M. Ali
Keyword(s):  
Porous Silicon ◽  
Blue Light ◽  
Current Density ◽  
Crystalline Silicon ◽  
Electrochemical Etching ◽  
Etching Time ◽  
Light Illumination ◽  
Average Pore ◽  
Zero Bias ◽  
P Type

In this work, porous silicon (PS) are fabricated using electrochemical etching (ECE) process for p-type crystalline silicon (c-Si) wafers of (100) orientation. The structural, morphological and electrical properties of PS synthesized at etching current density of (10, 20, 30) mA/cm2 at constant etching time 10 min are studied. From X-ray diffraction (XRD) measurement, the value of FWHM is in general decreases with increasing current density for p-type porous silicon (p-PS). Atomic force microscope (AFM) showed that for p-PS the average pore diameter decreases at 20 mA. Porous silicon which formed on silicon will be a junction so I-V characteristics have been studied in the dark to calculate ideality factor (n), and saturation current (Is) for these junctions. These junctions are used in photo sensors applications, where the photo sensors have been examined at blue light region. Sensitivity, rise and fall times have been calculated for this wavelength, the maximum value for sensitivity is (3797.6 %) at etching current density 10 mA/cm2 under blue light illumination at zero bias voltage.

scholarly journals Impact of Etching Time on Ideality Factor and Dynamic Resistance of Porous Silicon Prepared by Electrochemical Etching (ECE)

2017 ◽  
Vol 72 ◽  
pp. 28-36 ◽  
Author(s):  
Hasan A. Hadi
Keyword(s):  
Porous Silicon ◽  
Ideality Factor ◽  
Thermal Evaporation ◽  
Crystalline Silicon ◽  
Electrochemical Etching ◽  
Etching Time ◽  
Dynamic Resistance ◽  
Current Voltage ◽  
The One ◽  
P Type

In this work, porous silicon layers were fabricated on p-type crystalline silicon wafers using electrochemical etching ECE process. Al films were deposited onto porous layer /Si wafers by thermal evaporation to form rectifying junction. An investigation of the dependence on applied etching time to formed PS layer was studied. Effect etching time on the electrical properties of porous silicon is checked using Current–voltage I–V characteristics. The ideality factor and dynamic resistances are found to be large than the one and 20 (kΩ) respectively by the analysis of the dark I–V characteristics of Al/PS/p-Si heterojunction.

17.8%-efficient Amorphous Silicon Heterojunction Solar Cells on p-type Silicon Wafers

2006 ◽  
Vol 910 ◽  
Author(s):  
Qi Wang ◽  
Matt P. Page ◽  
Eugene Iwancizko ◽  
Yueqin Xu ◽  
Yanfa Yan ◽  
...  
Keyword(s):  
Solar Cells ◽  
Solar Cell ◽  
Amorphous Silicon ◽  
High Efficiency ◽  
Short Circuit ◽  
Open Circuit ◽  
Layer Growth ◽  
Surface Recombination Velocity ◽  
Back Contact ◽  
P Type

AbstractWe have achieved an independently-confirmed 17.8% conversion efficiency in a 1-cm2, p-type, float-zone silicon (FZ-Si) based heterojunction solar cell. Both the front emitter and back contact are hydrogenated amorphous silicon (a-Si:H) deposited by hot-wire chemical vapor deposition (HWCVD). This is the highest reported efficiency for a HWCVD silicon heterojunction (SHJ) solar cell. Two main improvements lead to our most recent increases in efficiency: 1) the use of textured Si wafers, and 2) the application of a-Si:H heterojunctions on both sides of the cell. Despite the use of textured c-Si to increase the short-circuit current, we were able to maintain the same 0.65 V open-circuit voltage as on flat c-Si. This is achieved by coating a-Si:H conformally on the c-Si surfaces, including covering the tips of the anisotropically-etched pyramids. A brief atomic H treatment before emitter deposition is not necessary on the textured wafers, though it was helpful in the flat wafers. It is essential to high efficiency SHJ solar cells that the emitter grows abruptly as amorphous silicon, instead of as microcrystalline or epitaxial Si. The contact on each side of the cell comprises a thin (< 5 nm) low substrate temperature (~100°C) intrinsic a-Si:H layer, followed by a doped layer. Our intrinsic layers are deposited at 0.3-1.2 nm/s. The doped emitter and back-contact layers were deposited at a higher temperature (>200°C) and grown from PH3/SiH4/H2 and B2H6/SiH4/H2 doping gas mixtures, respectively. This combination of low (intrinsic) and high (doped layer) growth temperatures was optimized by lifetime and surface recombination velocity measurements. Our rapid efficiency advance suggests that HWCVD may have advantages over plasma-enhanced (PE) CVD in fabrication of high-efficiency heterojunction c-Si cells; there is no need for process optimization to avoid plasma damage to the delicate, high-quality, Si wafers.

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