scholarly journals Embedded System IOT Gateway Design

2018 ◽  
Vol 1 (1) ◽  
Author(s):  
Zedong Zhang
Keyword(s):  
Remote Control ◽  
Embedded System ◽  
Sensor Network ◽  
Software Design ◽  
Sensing Systems ◽  
Important Link ◽  
Different Types ◽  
The Embedded System

The IOT gateway is an important link between the sensor network and thecommunication network. The IOT gateway design of the embedded system canrealize the normal access of some different types of sensing systems under the control of software, and is used in various occasions. In the design of the IOT gateway, not only the service functions of the gateway can be realized, but also unified control and remote control of these devices to ensure the security of its communication. This paper analyzes the problem from the hardware and software design of the IOT gateway, expecting to provide reference for relevant personnel.

Induction Motor Conditional Monitoring Using Wireless Sensor Network

2014 ◽  
Vol 626 ◽  
pp. 95-100 ◽  
Author(s):  
P. Shoba ◽  
B. Arivuselvam
Keyword(s):  
Wireless Sensor Network ◽  
Embedded System ◽  
Sensor Network ◽  
Output Voltage ◽  
Wireless Sensor ◽  
Maintenance Cost ◽  
Output Current ◽  
Non Invasive ◽  
Torque Estimation ◽  
The Embedded System

This system is used for monitoring the speed, torque, efficiency, voltage & current by employing ZigBee based wireless sensor network. Embedded system is used for acquiring electrical signals from the motors in a non-invasive way. The speed and torque estimation is done locally. An embedded system is used to control the speed of the motor the values calculated by the embedded system are transmitted to the monitoring unit through ZigBee based wireless sensor network and it can be monitored locally in PC. The main advantages of using ZigBee are low maintenance cost, security, reliability and through output. Using simulation, the characteristic graph for speed, torque, output voltage and output current can be obtained.

Intelligent Vision Tester Based on Embedded System

2014 ◽  
Vol 971-973 ◽  
pp. 1234-1237
Author(s):  
Xue Feng Yang ◽  
Li Gang Chen
Keyword(s):  
Visual Acuity ◽  
Remote Control ◽  
Embedded System ◽  
Digital Display ◽  
Test Results ◽  
Testing Instrument ◽  
Power Supply Circuit ◽  
Measuring Efficiency ◽  
Stable Performance ◽  
The Embedded System

To solve the problem that artificial visual acuity measuring efficiency is low in hospital and school,and waste of resources,this design introduces an intelligent vision test instrument.The instrument is controlled by Embedded system [1,2], including the power supply circuit, a wireless remote control circuit module,LED display circuit,digital display circuit,a voice circuit etc.Beginning of vision test after audio prompt.This time the LED random light under every line in the standard visual acuity chart.The test selects the direction of wireless remote control rocker of "up", "down", "left", "right"through the "E" the opening direction on standard visual acuity chart.Data is transmitted to the Embedded system,after data processing,to judge whether he is right and wrong,and then displayed.Intelligent vision testing instrument can achieve the anticipated goal,finally complete the design and production, The overall structure of the circuit device is simple, stable performance, the test results meet the requirements.

scholarly journals Design of the Configurable Watch Dog Timer using FPGA in Space Probe Application

2019 ◽  
Vol 8 (10) ◽  
pp. 3555-3558
Keyword(s):  
Embedded System ◽  
Space Probe ◽  
Different Types ◽  
The Embedded System

Watchdog timer is a simple timer circuit. It is an indispensable part and is of paramount importance when coming to the embedded system. Most implementations of watch dog are simply based on simple feed dog strategy covering merely limited abnormal states of program. There are different types of watch dog timers due to the increasing need. They include Standard watchdog timer, Windowed watch dog timer, sequenced watch dog timer. But an effective watch dog timer should be able to detect all abnormal software modes and bring the system back to a known state. In addition to that, it must have its own clock and should be capable of providing a hardware reset on timeout to all the peripherals which the current timers lag. Hence the windowed watchdog timer where the window periods can be configured during the software initialization. In the watchdog timers which are available right now is processor dependent due to which there is a increase in the timing but there is a need of a watchdog timer which has capability to cut down or reduce timing hence watchdog timer which has got service, frame and controller windows have been used, which is independent of the processor and hence the timing is reduced effectively.

The Design of Embedded Multi-Channel Data Acquisition System

2012 ◽  
Vol 182-183 ◽  
pp. 660-664
Author(s):  
Yan Zhang Qiu ◽  
Liang Guo ◽  
Sheng Hui Liu
Keyword(s):  
Embedded System ◽  
Data Acquisition ◽  
Software Design ◽  
Flash Memory ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Serial Port ◽  
The Embedded System ◽  
Ethernet Interface ◽  
Expansion Circuit

This paper analyzes the Flash Memory interface, SDRAM interface, Ethernet interface and Serial-port expansion circuit. The Embedded Multi-channel Data Acquisition System is designed by MCF5272 microprocessor. The main control system of MCF5272 includes SDRAM, Flash and BDM interface and so on. At the software design, we main introduce the compile and develop of bootload and the compiler and debugging environment of μClinux build. On this base, the general methods and points of the embedded system hardware design were summarized.

scholarly journals Multiple Narrowband Interferences Characterization, Detection and Mitigation Using Simplified Welch Algorithm and Notch Filtering

2021 ◽  
Vol 11 (3) ◽  
pp. 1331
Author(s):  
Mohammad Hossein Same ◽  
Gabriel Gleeton ◽  
Gabriel Gandubert ◽  
Preslav Ivanov ◽  
Rene Jr Landry
Keyword(s):  
Power Spectrum ◽  
Embedded System ◽  
Radio Frequency ◽  
Satellite Communication ◽  
Signal To Noise Ratio ◽  
Center Frequency ◽  
Infinite Impulse Response ◽  
Frequency Variation ◽  
Welch Method ◽  
The Embedded System

By increasing the demand for radio frequency (RF) and access of hackers and spoofers to low price hardware and software defined radios (SDR), radio frequency interference (RFI) became a more frequent and serious problem. In order to increase the security of satellite communication (Satcom) and guarantee the quality of service (QoS) of end users, it is crucial to detect the RFI in the desired bandwidth and protect the receiver with a proper mitigation mechanism. Digital narrowband signals are so sensitive into the interference and because of their special power spectrum shape, it is hard to detect and eliminate the RFI from their bandwidth. Thus, a proper detector requires a high precision and smooth estimation of input signal power spectral density (PSD). By utilizing the presented power spectrum by the simplified Welch method, this article proposes a solid and effective algorithm that can find all necessary interference parameters in the frequency domain while targeting practical implantation for the embedded system with minimum complexity. The proposed detector can detect several multi narrowband interferences and estimate their center frequency, bandwidth, power, start, and end of each interference individually. To remove multiple interferences, a chain of several infinite impulse response (IIR) notch filters with multiplexers is proposed. To minimize damage to the original signal, the bandwidth of each notch is adjusted in a way that maximizes the received signal to noise ratio (SNR) by the receiver. Multiple carrier wave interferences (MCWI) is utilized as a jamming attack to the Digital Video Broadcasting-Satellite-Second Generation (DVB-S2) receiver and performance of a new detector and mitigation system is investigated and validated in both simulation and practical tests. Based on the obtained results, the proposed detector can detect a weak power interference down to −25 dB and track a hopping frequency interference with center frequency variation speed up to 3 kHz. Bit error ratio (BER) performance shows 3 dB improvement by utilizing new adaptive mitigation scenario compared to non-adaptive one. Finally, the protected DVB-S2 can receive the data with SNR close to the normal situation while it is under the attack of the MCWI jammer.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

Reform of embedded system experiment course based on engineering education accreditation

2020 ◽  
pp. 002072092091815
Author(s):  
Yong Luo ◽  
Shuai-Bing Qin ◽  
Dong-Shu Wang
Keyword(s):  
Education Reform ◽  
Embedded System ◽  
Engineering Education ◽  
Assessment Method ◽  
Teaching Model ◽  
Electronic Information ◽  
Course Content ◽  
Practical Operation ◽  
System Experiment ◽  
The Embedded System

With the continuous development of engineering education accreditation in China, its concept has had a profound impact on the reform of various majors in higher education. Using the idea of engineering education accreditation, this paper discusses the main problems in the implementation of embedded experimental courses of electronic information majors and proposes related education reform programs. Taking the embedded system experiment course of the automation major and embedded system major of Zhengzhou University as examples, the course has carried out research on the aspects of teaching model, experimental course content, scientific assessment method, etc., and proposed corresponding improvement methods to achieve better effect. The practical operation result has proved that the embedded system experiment course of the automation major and embedded system major improved the students’ ability and met the requirements of professional accreditation.

Structure of an Embedded System Software Platform for Plate Recognition System Based on Applied Mechanics

2012 ◽  
Vol 460 ◽  
pp. 266-270
Author(s):  
Xing Wu Sun ◽  
Yu Chen ◽  
Ai Fei Wang
Keyword(s):  
Embedded System ◽  
Recognition System ◽  
Cmos Camera ◽  
Camera System ◽  
New Thought ◽  
Development Platform ◽  
Embedded Linux System ◽  
Acquisition Device ◽  
The Embedded System ◽  
And Control

According to the shortcomings of large volume and high cost about the plate recognition system, an embedded plate recognition system is developed based on the ARM11 processor at lower costs. Taking the embedded Linux system as the software development platform, the system uses graphical user interface to operate and control the machine. Using CMOS camera system as image acquisition device, the system adopts HSV algorithm to realize the image classification on the platform of the embedded plate recognition system. The experimental results show that the embedded system runs stably, can realize the plate classification by color, and has the advantages of small size, low power consumption, convenience for using and so on. The embedded system provides a new thought for plate recognition.

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