UTC Clinic Hospital Network: Description of International Network of Failure Analysis Labs and Case Studies

Author(s):  
Timothy C. Wilkins

Abstract This paper describes the organization, process, and challenges of an international network of electrical and mechanical failure analysis labs that leverage lessons learned, resources, failure analysis techniques, and benchmarking of current common problems. Formed 11 years ago as just an electrical/electronic part failure analysis council within Otis Elevator and Carrier, this group has grown to be a network of 16 electrical and 22 mechanical labs. This council is a one of a kind network that also includes suppliers of parts to UTC. This paper will also illustrate the advantages of cross-functional and divisional leveraging with case study examples.

Author(s):  
Amy Poe ◽  
Steve Brockett ◽  
Tony Rubalcava

Abstract The intent of this work is to demonstrate the importance of charged device model (CDM) ESD testing and characterization by presenting a case study of a situation in which CDM testing proved invaluable in establishing the reliability of a GaAs radio frequency integrated circuit (RFIC). The problem originated when a sample of passing devices was retested to the final production test. Nine of the 200 sampled devices failed the retest, thus placing the reliability of all of the devices in question. The subsequent failure analysis indicated that the devices failed due to a short on one of two capacitors, bringing into question the reliability of the dielectric. Previous ESD characterization of the part had shown that a certain resistor was likely to fail at thresholds well below the level at which any capacitors were damaged. This paper will discuss the failure analysis techniques which were used and the testing performed to verify the failures were actually due to ESD, and not caused by weak capacitors.


Author(s):  
Kuo Hsiung Chen ◽  
Wen Sheng Wu ◽  
Yu Hsiang Shu ◽  
Jian Chan Lin

Abstract IR-OBIRCH (Infrared Ray – Optical Beam Induced Resistance Change) is one of the main failure analysis techniques [1] [2] [3] [4]. It is a useful tool to do fault localization on leakage failure cases such as poor Via or contact connection, FEoL or BEoL pattern bridge, and etc. But the real failure sites associated with the above failure mechanisms are not always found at the OBIRCH spot locations. Sometimes the real failure site is far away from the OBIRCH spot and it will result in inconclusive PFA Analysis. Finding the real failure site is what matters the most for fault localization detection. In this paper, we will introduce one case using deep sub-micron process generation which suffers serious high Isb current at wafer donut region. In this case study a BEoL Via poor connection is found far away from the OBIRCH spots. This implies that layout tracing skill and relation investigation among OBIRCH spots are needed for successful failure analysis.


Author(s):  
Yongkai Zhou ◽  
Jie Zhu ◽  
Han Wei Teo ◽  
ACT Quah ◽  
Lei Zhu ◽  
...  

Abstract In this paper, two failure analysis case studies are presented to demonstrate the importance of sample preparation procedures to successful failure analyses. Case study 1 establishes that Palladium (Pd) cannot be used as pre-FIB coating for SiO2 thickness measurement due to the spontaneously Pd silicide formation at the SiO2/Si interface. Platinum (Pt) is thus recommended, in spite of the Pt/SiO2 interface roughness, as the pre-FIB coating in this application. In the second case study, the dual-directional TEM inspection method is applied to characterize the profile of the “invisible” tungsten residue defect. The tungsten residue appears invisible in the planeview specimen due to the low mass-thickness contrast. It is then revealed in the cross-sectional TEM inspection.


This chapter offers a case study comparison in order to extrapolate lessons learned from different contexts and to investigate the key elements of effective mediation. The investigation and exploration looks at the following categories: (1) key lessons learned; (2) background of the conflict, including chronology of main event, causes of incompatibility, and balance of forces1; (3) pre-negotiation phase, including previous attempts to negotiate the issues and highlighting entry points for third parties; (4) negotiation phase, including style and strategy, key issues, participation and inclusivity, special considerations; and (5) assessment, including an appreciation of agreement, context, and outlook.


Metals ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 816 ◽  
Author(s):  
Beatriz González-Ciordia ◽  
Borja Fernández ◽  
Garikoitz Artola ◽  
Maider Muro ◽  
Ángel Sanz ◽  
...  

Any manufacturing equipment designed from scratch requires a detailed follow-up of the performance for the first units placed in service during the production ramp-up, so that lessons learned are immediately implemented in next deliveries and running equipment is accordingly updated. Component failure analysis is one of the most valuable sources of improvement among these lessons. In this context, a failure-assessment based design revision of the conveying system of a newly developed press hardening furnace is presented. The proposed method starts with a forensic metallurgical analysis of the failed components, followed by an investigation of the working conditions to ensure they match the forensic observations. The results of this approach evidenced an initially unforeseen thermo-mechanical damage produced by a combination of thermal distortions, material ageing, and mechanical fatigue. Once the cause–effect relationship for the failure is backed up by evidence, an improved design is proposed. As a conclusion, a new standard design for the furnace entrance set of rollers in hot stamping lines was established for roller hearth furnaces. The solution can be extended to similar applications, ensuring the same issues will not arise thanks to the lessons learned.


2016 ◽  
Vol 118 (5) ◽  
Author(s):  
Blake E. Angelo ◽  
Becca B.R. Jablonski ◽  
Dawn Thilmany

Purpose A body of literature and case studies has developed as part of the reporting, outreach and evaluation of the local and regional food system projects supported by grants and other funders. Yet, there is concern that food value chains are promoted without adequately evaluating the viability of these businesses, or how these markets affect the performance and welfare of key stakeholders: farm vendors and local communities/economies. Design/methodology/approach This paper reviews and summarizes a comprehensive set of U.S.-based case studies focused on food value chains. We conduct a meta-analysis to systematically capture what available case study evidence tells us about: 1) trends in the viability of food value chain businesses; 2) the impact of these businesses on participating farm vendors; and, 3) the associated community economic development outcomes (framed in terms of ‘wealth creation’). Findings In addition to sharing findings from the meta-analysis, we demonstrate how the lack of standardized protocols for case study development is a barrier to learning about metric comparisons, best practices, and what impacts these food value chain businesses may have. We conclude with some recommendations of how the field can move forward to evaluate and share lessons learned using more uniform, project-driven case study development. Originality/value This is the first study to conduct a systematic meta-analysis of U.S. food value chain businesses.


Author(s):  
James B. Riddle

Abstract This paper will examine semiconductor wear out at San Onofre Nuclear Generation Station (SONGS). The topics will include case studies, failure mechanisms, diagnostic techniques, failure analysis techniques and root cause corrective actions. Nuclear power plants are unique in that instrumentation and control circuits are continuously energized, are periodically tested, and have been in operation for greater than 25 years. Root cause evaluations at SONGS have identified numerous semiconductor failures due to wear out. Case studies include light output deterioration in opto-isolators, junction alloying failures of transistors and integrated circuits and parametric shifts in operational amplifiers. In most cases the devices do not fail catastrophically but degraded to the point of circuit level functional failure. Failure analysis techniques include circuit analysis, board level troubleshooting to identify the degraded components. Intermittent failures require power cycling, thermal cycling, and long term monitoring to identify the responsible components. Corrective actions for semiconductor wear out at SONGS include enhanced monitoring and proactive change out of identified part types.


Author(s):  
D. Davis ◽  
O. Diaz de Leon ◽  
L. Hughes ◽  
S. V. Pabbisetty ◽  
R. Parker ◽  
...  

Abstract The advent of Flip Chip and other complex package configurations and process technologies have made conventional failure analysis techniques inapplicable. This paper covers the ways in which conventional techniques have been modified to meet the FA challenges presented by these new devices – specifically, by forcing analysis to be done from the backside of the device. Modifications to the traditional FA process steps, including new sample preparation methods, changes in hardware, and alterations to physical failure analysis processes are described. To demonstrate the use of backside analytical approaches, some examples of applications and a case study are also included.


Author(s):  
Vikash Kumar ◽  
Devraj Karthikeyan

Abstract Fault localization is a common failure analysis process that is used to detect the anomaly on a faulty device. The Infrared Lock-In Thermography (LIT) is one of the localization techniques which can be used on the packaged chips for identifying the heat source which is a result of active damage. This paper extends the idea that the LIT analysis for fault localization is not only limited to the devices within the silicon die but it also highlights thermal failure indications of other components on the PCB (like capacitors, FETs etc on a system level DC-DC μmodule). The case studies presented demonstrate the effectiveness of using LIT in the Failure analysis process of a system level DC-DC μmodule regulator


Author(s):  
Kartik Ramanujachar

Abstract This paper describes the use of image processing techniques in metrology and failure analysis with the help of three case studies. The first study concerns a technique that significantly automates the process and hence enables both a rapid and accurate extraction of cumulative distribution function for transistor CD through the use of edge detection and quantification of image intensities. The second study is about utilizing a cross correlation algorithm and an appropriately chosen sample and image to estimate the "on image" spatial resolution of an scanning electron microscope. The last case study uses image data acquired with an atomic force microscope. The paper describes how information theoretic concepts like entropy and mutual information combined with image segmentation and nearest neighbor extraction can be used to isolate those regions of the AFM scan that can potentially benefit from further analysis.


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