Application of Electro Optical Terahertz Pulse Reflectometry for Fault Localization and Defect Analysis

2017 ◽  
Author(s):  
Yi-Sheng Lin ◽  
Yu-Hsiang Hsiao ◽  
Shu-Hua Lee
Keyword(s):  
Failure Analysis ◽  
Semiconductor Industry ◽  
Fault Isolation ◽  
Defect Analysis ◽  
Wafer Level ◽  
Terahertz Pulse ◽  
Electrical Failure ◽  
Analysis Technique ◽  
Destructive Analysis ◽  
Non Destructive

Abstract Electro Optical Terahertz Pulse Reflectometry (EOTPR) is an E-FA (Electrical Failure Analysis) technique in the semiconductor industry for non-destructive electrical fault isolation for shorts, leakages and opens. This paper introduces the capability and presents several case studies identifying the physical location of defects where EOTPR is useful as a non-destructive analysis technique. In this paper, the methodology and application of EOTPR on open and short failure isolations in advanced 2.5D IC and wafer level packages (WLP) have been presented. The experimental results of P-FA (Physical Failure Analysis) verify the accuracy of the EOTPR system in determining the distance to defect.

scholarly journals Universal Application of Load Board (L/B) and Socket with Direct Current Tester (DCT) for Various Packages

2021 ◽  
Author(s):  
Yi-Sheng Lin ◽  
Yu-Hsiang Hsiao ◽  
Pei-Yu Tseng ◽  
Yu-Jen Chang ◽  
Cheng-Hsin Liu ◽  
...  
Keyword(s):  
Direct Current ◽  
Semiconductor Industry ◽  
Mapping Function ◽  
Electrical Failure ◽  
Defect Location ◽  
Analysis Technique ◽  
Destructive Analysis ◽  
Solder Balls ◽  
Non Destructive ◽  
Universal Application

Abstract We develop a new workflow with O/S tester (Direct Current Tester, DCT) to detect quickly the defect location of failure packages, which can be used in the semiconductor industry for E-FA (Electrical Failure Analysis) fault localization for short, leakage, and open defects. This paper introduces the capability and presents two case studies identifying the defect location of solder balls where DCT with defect mapping function is useful as a non-destructive analysis technique. In this paper, the new methodology and application of DCT on open and short defects in various packages with different sizes have been presented. The experimental results of the design testing program and an intender tooling were verified for the accuracy of the defect mapping function in determining the pin location to defect.

Advanced FIB Application—Automated, Precision Deprocessing for Failure Analysis

2013 ◽  
Author(s):  
Dandan Wang ◽  
Hua Feng ◽  
Pik Kee Tan ◽  
Guorong Low ◽  
Khiam Oh Chong ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
High Precision ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Region Of Interest ◽  
Wafer Level ◽  
Analysis Technique

Abstract Focused Ion Beam is widely used in semiconductor industry for critical applications such as TEM sample preparation and circuit edit. In this paper, we introduce an automated failure analysis technique for high precision polishing at the wafer level. Using FIB, it is possible to precisely mill at a region of interest, capture images at the region of interest simultaneously and cut into the die directly to expose the exact failure without damaging other sections of the specimen.

Time Domain Reflectometry—Case Studies in Electrical Failure Isolation

2015 ◽  
Author(s):  
Jason Wheeler ◽  
Stephen Fasolino
Keyword(s):  
Case Studies ◽  
Time Domain ◽  
Time Domain Reflectometry ◽  
Electrical Failure ◽  
Physical Location ◽  
Analysis Technique ◽  
Destructive Analysis ◽  
Non Destructive

Abstract Time Domain Reflectometry (TDR) is an analysis technique for characterizing a transmission environment (PCB traces, cable assemblies, etc.) and identifying the physical location of defects or impedance discontinuities which can quickly narrow the focus of an investigation. This paper introduces the capability and presents several case studies spanning different applications where TDR was useful as a non-destructive analysis technique.

scholarly journals Detection of Local Cu-to-Cu Bonding Defects in Wafer-to-Wafer Hybrid Bonding Using GHz-SAM

2018 ◽  
Author(s):  
Ingrid de Wolf ◽  
Ahmad Khaled ◽  
Soon-Wook Kim ◽  
Soon-Wook Kim ◽  
Eric Beyne ◽  
...  
Keyword(s):  
High Resolution ◽  
Failure Analysis ◽  
Wafer Level ◽  
Analysis Technique ◽  
Level Scale ◽  
Cu Bonding ◽  
Non Destructive

Abstract This paper demonstrates the application of GHz-SAM for the detection of local non-bonded regions between micron-sized Cu-pads in a wafer-to-wafer hybrid bonded sample. GHz-SAM is currently the only available non-destructive failure analysis technique that can offer this information on wafer level scale, with such high resolution.

3D Magnetic Field Imaging for Non-Destructive Fault Isolation

2013 ◽  
Author(s):  
A. Orozco ◽  
J. Gaudestad ◽  
N.E. Gagliolo ◽  
C. Rowlett ◽  
E. Wong ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Semiconductor Industry ◽  
Fault Isolation ◽  
Wafer Level ◽  
Moore’S Law ◽  
Moore's Law ◽  
Magnetic Field Imaging ◽  
Silicon Vias ◽  
Non Destructive ◽  
Field Imaging

Abstract While transistor gate lengths may continue to shrink for some time, the semiconductor industry faces increasing difficulties to satisfy Moore’s Law. One solution to satisfying Moore’s Law in the future is to stack transistors in a 3-dimensional (3D) formation. In addition, the need for expanding functionality, real-estate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques. We describe in this paper innovations in Magnetic Field Imaging for FI which have the potential to allow 3D characterization of currents for non-destructive fault isolation at every chip level in a 3D stack.

Thin-Die Flip Chip Physical-FA Process Flow

2002 ◽  
Author(s):  
Andrew J. Komrowski ◽  
N. S. Somcio ◽  
Daniel J. D. Sullivan ◽  
Charles R. Silvis ◽  
Luis Curiel ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Flip Chip ◽  
Semiconductor Industry ◽  
Organic Substrate ◽  
Fault Isolation ◽  
Preparation Methods ◽  
Chip Technology ◽  
Isolation Test ◽  
Sample Preparation Methods

Abstract The use of flip chip technology inside component packaging, so called flip chip in package (FCIP), is an increasingly common package type in the semiconductor industry because of high pin-counts, performance and reliability. Sample preparation methods and flows which enable physical failure analysis (PFA) of FCIP are thus in demand to characterize defects in die with these package types. As interconnect metallization schemes become more dense and complex, access to the backside silicon of a functional device also becomes important for fault isolation test purposes. To address these requirements, a detailed PFA flow is described which chronicles the sample preparation methods necessary to isolate a physical defect in the die of an organic-substrate FCIP.

Failure Analysis and Defect Inspection of Electronic Devices by High-Resolution Cathodoluminescence

2017 ◽  
Author(s):  
C. Monachon ◽  
M.S. Zielinski ◽  
D. Gachet ◽  
S. Sonderegger ◽  
S. Muckenhirn ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Electronic Materials ◽  
Electronic Devices ◽  
Optical Emission ◽  
Large Field ◽  
Nanometer Scale ◽  
Defect Analysis ◽  
Defect Inspection ◽  
Spectrally Resolved ◽  
Non Destructive

Abstract Quantitative cathodoluminescence (CL) microscopy is a new optical spectroscopy technique that measures electron beam-induced optical emission over large field of view with a spatial resolution close to that of a scanning electron microscope (SEM). Correlation of surface morphology (SE contrast) with spectrally resolved and highly material composition sensitive CL emission opens a new pathway in non-destructive failure and defect analysis at the nanometer scale. Here we present application of a modern CL microscope in defect and homogeneity metrology, as well as failure analysis in semiconducting electronic materials

Extending Acoustic Microscopy for Comprehensive Failure Analysis Applications

2010 ◽  
Author(s):  
Sebastian Brand ◽  
Matthias Petzold ◽  
Peter Czurratis ◽  
Peter Hoffrogge
Keyword(s):  
Image Processing ◽  
Failure Analysis ◽  
Signal Analysis ◽  
Flip Chip ◽  
Fault Isolation ◽  
Acoustic Microscopy ◽  
Specific Information ◽  
Full Potential ◽  
Time Frequency ◽  
Non Destructive

Abstract In industrial manufacturing of microelectronic components, non-destructive failure analysis methods are required for either quality control or for providing a rapid fault isolation and defect localization prior to detailed investigations requiring target preparation. Scanning acoustic microscopy (SAM) is a powerful tool enabling the inspection of internal structures in optically opaque materials non-destructively. In addition, depth specific information can be employed for two- and three-dimensional internal imaging without the need of time consuming tomographic scan procedures. The resolution achievable by acoustic microscopy is depending on parameters of both the test equipment and the sample under investigation. However, if applying acoustic microscopy for pure intensity imaging most of its potential remains unused. The aim of the current work was the development of a comprehensive analysis toolbox for extending the application of SAM by employing its full potential. Thus, typical case examples representing different fields of application were considered ranging from high density interconnect flip-chip devices over wafer-bonded components to solder tape connectors of a photovoltaic (PV) solar panel. The progress achieved during this work can be split into three categories: Signal Analysis and Parametric Imaging (SA-PI), Signal Analysis and Defect Evaluation (SA-DE) and Image Processing and Resolution Enhancement (IP-RE). Data acquisition was performed using a commercially available scanning acoustic microscope equipped with several ultrasonic transducers covering the frequency range from 15 MHz to 175 MHz. The acoustic data recorded were subjected to sophisticated algorithms operating in time-, frequency- and spatial domain for performing signal- and image analysis. In all three of the presented applications acoustic microscopy combined with signal- and image processing algorithms proved to be a powerful tool for non-destructive inspection.

Case Study in Fault Isolation of a Metal Short for Yield Enhancement

2010 ◽  
Author(s):  
Sarven Ipek ◽  
David Grosjean
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Photon Emission ◽  
Fault Isolation ◽  
Yield Enhancement ◽  
Analysis Technique ◽  
Laser Signal ◽  
Signal Injection ◽  
Microscopy Techniques

Abstract The application of an individual failure analysis technique rarely provides the failure mechanism. More typically, the results of numerous techniques need to be combined and considered to locate and verify the correct failure mechanism. This paper describes a particular case in which different microscopy techniques (photon emission, laser signal injection, and current imaging) gave clues to the problem, which then needed to be combined with manual probing and a thorough understanding of the circuit to locate the defect. By combining probing of that circuit block with the mapping and emission results, the authors were able to understand the photon emission spots and the laser signal injection microscopy (LSIM) signatures to be effects of the defect. It also helped them narrow down the search for the defect so that LSIM on a small part of the circuit could lead to the actual defect.

3D IC/Stacked Device Fault Isolation Using 3D Magnetic Field Imaging

2014 ◽  
Author(s):  
A. Orozco ◽  
N.E. Gagliolo ◽  
C. Rowlett ◽  
E. Wong ◽  
A. Moghe ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Fault Isolation ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Current Location ◽  
Geometrical Information ◽  
Magnetic Field Imaging ◽  
Silicon Vias ◽  
Non Destructive ◽  
Field Imaging

Abstract The need to increase transistor packing density beyond Moore's Law and the need for expanding functionality, realestate management and faster connections has pushed the industry to develop complex 3D package technology which includes System-in-Package (SiP), wafer-level packaging, through-silicon-vias (TSV), stacked-die and flex packages. These stacks of microchips, metal layers and transistors have caused major challenges for existing Fault Isolation (FI) techniques and require novel non-destructive, true 3D Failure Localization techniques. We describe in this paper innovations in Magnetic Field Imaging for FI that allow current 3D mapping and extraction of geometrical information about current location for non-destructive fault isolation at every chip level in a 3D stack.

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