scholarly journals Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1120
Author(s):  
Ayman A. Althuwayb ◽  
Mohammad Alibakhshikenari ◽  
Bal S. Virdee ◽  
Harry Benetatos ◽  
Francisco Falcone ◽  
...  
Keyword(s):  
High Performance ◽  
Silicon Oxide ◽  
Coplanar Waveguide ◽  
Promising Candidate ◽  
Antenna Structure ◽  
Physical Size ◽  
Wireless Applications ◽  
Effective Aperture ◽  
On Chip ◽  
Thz Antenna

This paper presents the design of a high-performance 0.45–0.50 THz antenna on chip (AoC) for fabrication on a 100-micron GaAs substrate. The antenna is based on metasurface and substrate-integrated waveguide (SIW) technologies. It is constituted from seven stacked layers consisting of copper patch–silicon oxide–feedline–silicon oxide–aluminium–GaAs–copper ground. The top layer consists of a 2 × 4 array of rectangular metallic patches with a row of subwavelength circular slots to transform the array into a metasurface. This essentially enlarges the effective aperture area of the antenna. The antenna is excited using a coplanar waveguide feedline that is sandwiched between the two silicon oxide layers below the patch layer. The proposed antenna structure reduces substrate loss and surface waves. The AoC has dimensions of 0.8 × 0.8 × 0.13 mm3. The results show that the proposed structure greatly enhances the antenna’s gain and radiation efficiency, and this is achieved without compromising its physical size. The antenna exhibits an average gain and efficiency of 6.5 dBi and 65%, respectively, which makes it a promising candidate for emerging terahertz applications.

A Novel Integrated MEMS Pyramidal Horn Antenna for Terahertz Applications

2013 ◽  
Vol 760-762 ◽  
pp. 434-437
Author(s):  
Lin Guo ◽  
Feng Yi Huang ◽  
Xu Sheng Tang
Keyword(s):  
High Performance ◽  
Horn Antenna ◽  
Fabrication Cost ◽  
Terahertz Applications ◽  
Mems Technology ◽  
Pyramidal Horn ◽  
On Chip ◽  
Thz Applications ◽  
Thz Antenna

This paper reports the design and analysis of a novel pyramidal horn antenna based on Micro­electromechanical Systems (MEMS) technology, which is used in terahertz (THz) applications. The structure of the antenna includes two parts, pyramidal horn and inverted pyramidal horn for feed, the fabrication of the structure needs only one wafer, and the antenna can be easily integrated with other parts of on-chip circuits. There are many tunable parameters of the horn, so that high performance THz antenna can be achieved by optimizing these parameters. The proposed antenna can be manufactured by MEMS processing with low fabrication cost, suitable for many terahertz systems.

High‐Performance On‐Chip Electron Sources Based on Electroformed Silicon Oxide

2020 ◽  
Vol 6 (7) ◽  
pp. 2000268
Author(s):  
Wei Yang ◽  
Zhiwei Li ◽  
Yuwei Wang ◽  
Jun Shen ◽  
Dapeng Wei ◽  
...  
Keyword(s):  
High Performance ◽  
Silicon Oxide ◽  
Electron Sources ◽  
On Chip

SOC DESIGN FOR WIRELESS COMMUNICATIONS

2011 ◽  
Vol 20 (08) ◽  
pp. 1505-1527 ◽  
Author(s):  
ZORAN STAMENKOVIĆ
Keyword(s):  
Error Detection ◽  
High Performance ◽  
Basic Knowledge ◽  
Embedded Devices ◽  
Chip Design ◽  
Wireless Applications ◽  
Systems On Chip ◽  
Early Error ◽  
Custom Hardware ◽  
On Chip

The paper emphasizes methods, architectures, and components for system-on-chip design. It describes the basic knowledge and skills for designing high-performance low-power embedded devices whose complexity increases exponentially, as so does the effort of designing them. Relying upon an appropriate design methodology which concentrates on reuse, executable specifications, and early error detection, these complexities can be mastered. The paper bundles these topics in order to provide a good understanding of all the problems involved. It shows how to go from description and verification to implementation and testing, presenting three systems-on-chip for three different wireless applications based on configurable processors and custom hardware accelerators.

A miniaturized CPW-fed on-chip UWB monopole antenna with band-notch characteristics

2019 ◽  
Vol 12 (1) ◽  
pp. 95-102
Author(s):  
S. Mandal ◽  
A. Karmakar ◽  
H. Singh ◽  
S. K. Mandal ◽  
R. Mahapatra ◽  
...  
Keyword(s):  
Satellite Communication ◽  
Coplanar Waveguide ◽  
Measured Data ◽  
Ultra Wideband ◽  
Center Frequency ◽  
Frequency Range ◽  
Antenna Structure ◽  
On Chip Antenna ◽  
Layout Area ◽  
On Chip

AbstractThis paper presents the design and analysis of a miniaturized, coplanar waveguide-fed ultra-wideband monopole on-chip antenna with band-notch characteristics. By incorporating a “U”-shaped slot in the feedline, a band-notch is realized in the frequency range of 7.9–8.4 GHz to avoid interference from the X-band uplink satellite communication system. The proposed antenna achieved good voltage standing wave ratio (VSWR) characteristics with VSWR value <2 for the frequency range of 2.5–20.1 GHz excluding the band-notched frequencies. The fractional bandwidth and bandwidth ratio are obtained as 156% and 8.04:1, respectively. Dominant factors that affect the center frequency and bandwidth of the notched band are thoroughly investigated. This paper addresses both frequency as well as time domain behavior of the proposed structure. Standard 675 µm thick, high resistive silicon substrate (ρ≥8 kΩ-cm, εr = 11.8, and tan δ = 0.01) is used to design the proposed compact antenna structure with a layout area of 8.5 × 11.5 mm2. Fabrication process steps along with simulated and measured data are presented here. A close analogy between simulated and measured data is observed.

Efficient Instruction and Data Caching for High Performance Embedded Processors

1970 ◽  
pp. 9
Author(s):  
A. Ferrerón Labari ◽  
D. Suárez Gracia ◽  
V. Viñals Yúfera
Keyword(s):  
Embedded Systems ◽  
Power Consumption ◽  
Low Power ◽  
Interconnection Networks ◽  
High Performance ◽  
Critical Issue ◽  
Content Management ◽  
Structure Design ◽  
Portable Devices ◽  
On Chip

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.

Dual Band Paper Substrate CPW Antenna for Wireless Applications

2019 ◽  
Vol 8 (9S3) ◽  
pp. 605-608
Keyword(s):  
Reflection Coefficient ◽  
Mobile Communication ◽  
Coplanar Waveguide ◽  
Dual Band ◽  
Antenna Feed ◽  
Paper Substrate ◽  
Frequency Bands ◽  
Wireless Applications

In this paper, a 15* 80 sized antenna is designed over a paper substrate to test its flexible properties. The proposed antenna feed by a grounded coplanar waveguide(GCPW) is stimulated and the measured results show the operating Dual Band of the antenna cover(3.34-3.62 GHz) and (5.92-6.24 GHz) with the reflection coefficient |S11|< -15dB.These frequency bands operate over SHF bands and hence supports Fixed Mobile Communication and WLAN applications.

Design and simulation of high performance router on chip based on random routing

2014 ◽  
Vol 27 (7) ◽  
pp. 669-675 ◽  
Author(s):  
Feng Yue ◽  
Runfeng Li ◽  
Tian Chen ◽  
Jun Liu ◽  
Peng Chen ◽  
...  
Keyword(s):  
High Performance ◽  
On Chip

Pharmacokinetics and Tissue Distribution Study of Ferruginol in Wistar Rat by High-performance Liquid Chromatography

2018 ◽  
Vol 15 (1) ◽  
pp. 67-73 ◽  
Author(s):  
Guiyun Cao ◽  
Suqiao Han ◽  
Keke Li ◽  
Li Shen ◽  
Xiaohong Wang ◽  
...  
Keyword(s):  
Tissue Distribution ◽  
Mobile Phase ◽  
High Performance ◽  
Wistar Rat ◽  
Freezing And Thawing ◽  
Promising Candidate ◽  
Distribution Study ◽  
Substance Loss ◽  
Tissue Distribution Study ◽  
The Brain

Background: Ferruginol (FRGN) exhibits a broad range of pharmacological properties which make it a promising candidate for chemoprevention. However, little is known about its absorption, distribution, metabolism, excretion, and toxicity (ADMET) properties. Methods: A rapid, sensitive and specific HPLC-DAD method was established to quantify FRGN in the plasma and tissues of Wistar rats. After extraction of FRGN with ethyl acetate (EtOAc), chromatographic separation was performed on a YMC ODS C18 column (250 × 4.6 mm I.D., 5 µm) with a mobile phase consisting of methanol-water (92:8, v/v) at a flow rate of 0.9 mL/min. Detection was conducted with a wavelength of 273 nm at 25 °C. Results: The calibration curves for FRGN were linear in the concentration range of 0.5-20 µg/mL for plasma, 0.5-10 µg/mL for heart, liver, spleen, lung, kidney, stomach, intestine, brain and muscle. After three cycles of freezing and thawing, the concentration variations were within ± 7% of nominal concentrations, indicating no significant substance loss during repeated thawing and freezing. The assay was applied to pharmacokinetic and tissue distribution study in rats. Results suggested that lung, heart, liver, spleen and kidney were the major distribution tissues of FRGN in rats, and FRGN could permeate the blood-brain barrier to distribute in the brain of rats. Conclusion: The information provided by this research is very useful for gaining knowledge of the pharmacokinetic process and tissue distribution of FRGN.

МЕТОДЫ ДОСТИЖЕНИЯ МАКСИМАЛЬНОЙ ЭФФЕКТИВНОСТИ ПЛАТФОРМЫ ПРОТОТИПИРОВАНИЯ ВЫСОКОПРОИЗВОДИТЕЛЬНЫХ СИСТЕМ НА КРИСТАЛЛЕ НА ЗАДАЧАХ ИСКУССТВЕННОГО ИНТЕЛЛЕКТА

2020 ◽  
Vol 96 (3s) ◽  
pp. 585-588
Author(s):  
С.Е. Фролова ◽  
Е.С. Янакова
Keyword(s):  
Neural Network ◽  
Artificial Intelligence ◽  
Computer Vision ◽  
High Performance ◽  
Systems On Chip ◽  
High Performance Systems ◽  
On Chip ◽  
Network Technologies ◽  
Neural Network Technologies

Предлагаются методы построения платформ прототипирования высокопроизводительных систем на кристалле для задач искусственного интеллекта. Изложены требования к платформам подобного класса и принципы изменения проекта СнК для имплементации в прототип. Рассматриваются методы отладки проектов на платформе прототипирования. Приведены результаты работ алгоритмов компьютерного зрения с использованием нейросетевых технологий на FPGA-прототипе семантических ядер ELcore. Methods have been proposed for building prototyping platforms for high-performance systems-on-chip for artificial intelligence tasks. The requirements for platforms of this class and the principles for changing the design of the SoC for implementation in the prototype have been described as well as methods of debugging projects on the prototyping platform. The results of the work of computer vision algorithms using neural network technologies on the FPGA prototype of the ELcore semantic cores have been presented.

scholarly journals Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Pulse Amplitude ◽  
Telecommunication Networks ◽  
Low Power Consumption ◽  
Power Efficient ◽  
High Speed Data ◽  
On Chip

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.

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