scholarly journals A Systematic Assessment of W-Doped CoFeB Single Free Layers for Low Power STT-MRAM Applications

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2384
Author(s):  
Siddharth Rao ◽  
Sebastien Couet ◽  
Simon Van Beek ◽  
Shreya Kundu ◽  
Shamin Houshmand Sharifi ◽  
...  

Spin-transfer torque magnetoresistive random access memory (STT-MRAM) technology is considered to be the most promising nonvolatile memory (NVM) solution for high-speed and low power applications. Dual MgO-based composite free layers (FL) have driven the development of STT-MRAMs over the past decade, achieving data retention of 10 years at the cost of higher write power consumption. In addition, the need for tunnel magnetoresistance (TMR)-based read schemes limits the flexibility in materials beyond the typical CoFeB/MgO interfaces. In this study, we propose a novel spacerless FL stack comprised of CoFeB alloyed with heavy metals such as tungsten (W) which allows effective modulation of the magnet properties (Ms, Hk) while retaining compatibility with MgO layers. The addition of W results favours a delayed crystallization process, in turn enabling higher thermal budgets up to 180 min at 400 °C. The presence of tungsten reduces the total FL magnetization (Ms) but simultaneously increasing its temperature dependence, thus, enabling a dynamic write current reduction of ~15% at 2 ns pulse widths. Reliable operation is demonstrated with a WER of 1 ppm and endurance >1010 cycles. These results pave the way for alternative designs of STT-MRAMs for low power electronics.

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1029 ◽  
Author(s):  
Writam Banerjee

Emerging nonvolatile memory (eNVM) devices are pushing the limits of emerging applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Among several alternatives, phase change memory, spin-transfer torque random access memory, and resistive random-access memory (RRAM) are major emerging technologies. This review explains all varieties of prototype and eNVM devices, their challenges, and their applications. A performance comparison shows that it is difficult to achieve a “universal memory” which can fulfill all requirements. Compared to other emerging alternative devices, RRAM technology is showing promise with its highly scalable, cost-effective, simple two-terminal structure, low-voltage and ultra-low-power operation capabilities, high-speed switching with high-endurance, long retention, and the possibility of three-dimensional integration for high-density applications. More precisely, this review explains the journey and device engineering of RRAM with various architectures. The challenges in different prototype and eNVM devices is disused with the conventional and novel application areas. Compare to other technologies, RRAM is the most promising approach which can be applicable as high-density memory, storage class memory, neuromorphic computing, and also in hardware security. In the post-CMOS era, a more efficient, intelligent, and secure computing system is possible to design with the help of eNVM devices.


SPIN ◽  
2012 ◽  
Vol 02 (02) ◽  
pp. 1250009 ◽  
Author(s):  
K. L. WANG ◽  
P. KHALILI AMIRI

Instant-on nonvolatile electronics, which can be powered on/off instantaneously without the loss of information, represents a new and emerging paradigm in electronics. Nonvolatile circuits consisting of volatile CMOS, combined with nonvolatile nanoscale magnetic memory, can make electronics nonvolatile at the gate, circuit and system levels. When high speed magnetic memory is embedded in CMOS logic circuits, it may help resolve the two major challenges faced in continuing CMOS scaling: Power dissipation and variability of devices. We will give a brief overview of the current challenges of CMOS in terms of energy dissipation and variability. Then, we describe emerging nonvolatile memory (NVM) options, particularly those spintronic solutions such as magnetoresistive random access memory (MRAM) based on spin transfer torque (STT) and voltage-controlled magnetoelectric (ME) write mechanisms. We will then discuss the use of STT memory for embedded application, e.g., replacing volatile CMOS Static RAM (SRAM), followed by discussion of integration of CMOS reconfigurable circuits with STT-RAM. We will then present the scaling limits of the STT memory and discuss its critical performance parameters, particularly related to switching energy. To further reduce the switching energy, we present the concept of electric field control of magnetism, and discuss approaches to realize this new mechanism in realizing low switching energy, allowing for implementation of nonvolatility at the logic gate level, and eventually at the transistor level with a magnetoelectric gate (MeGate). For nonvolatile logic (NVL), we present and discuss as an example an approach using interference of spin waves, which will have NVL operations remembering the state of computation. Finally, we will discuss the potential impact and implications of this new paradigm on low energy dissipation instant-on nonvolatile systems.


2012 ◽  
Vol 48 (6) ◽  
pp. 2016-2024 ◽  
Author(s):  
Niladri N. Mojumder ◽  
David W. Abraham ◽  
Kaushik Roy ◽  
D. C. Worledge

Micromachines ◽  
2021 ◽  
Vol 12 (5) ◽  
pp. 551
Author(s):  
Zhongjian Bian ◽  
Xiaofeng Hong ◽  
Yanan Guo ◽  
Lirida Naviner ◽  
Wei Ge ◽  
...  

Spintronic based embedded magnetic random access memory (eMRAM) is becoming a foundry validated solution for the next-generation nonvolatile memory applications. The hybrid complementary metal-oxide-semiconductor (CMOS)/magnetic tunnel junction (MTJ) integration has been selected as a proper candidate for energy harvesting, area-constraint and energy-efficiency Internet of Things (IoT) systems-on-chips. Multi-VDD (low supply voltage) techniques were adopted to minimize energy dissipation in MRAM, at the cost of reduced writing/sensing speed and margin. Meanwhile, yield can be severely affected due to variations in process parameters. In this work, we conduct a thorough analysis of MRAM sensing margin and yield. We propose a current-mode sensing amplifier (CSA) named 1D high-sensing 1D margin, high 1D speed and 1D stability (HMSS-SA) with reconfigured reference path and pre-charge transistor. Process-voltage-temperature (PVT) aware analysis is performed based on an MTJ compact model and an industrial 28 nm CMOS technology, explicitly considering low-voltage (0.7 V), low tunneling magnetoresistance (TMR) (50%) and high temperature (85 °C) scenario as the worst sensing case. A case study takes a brief look at sensing circuits, which is applied to in-memory bit-wise computing. Simulation results indicate that the proposed high-sensing margin, high speed and stability sensing-sensing amplifier (HMSS-SA) achieves remarkable performance up to 2.5 GHz sensing frequency. At 0.65 V supply voltage, it can achieve 1 GHz operation frequency with only 0.3% failure rate.


2012 ◽  
Vol 48 (11) ◽  
pp. 3025-3030 ◽  
Author(s):  
E. Chen ◽  
D. Apalkov ◽  
A. Driskill-Smith ◽  
A. Khvalkovskiy ◽  
D. Lottis ◽  
...  

2012 ◽  
Vol 12 (4) ◽  
pp. 756-766 ◽  
Author(s):  
Charles Augustine ◽  
Niladri Narayan Mojumder ◽  
Xuanyao Fong ◽  
Sri Harsha Choday ◽  
Sang Phill Park ◽  
...  

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