scholarly journals Electrical Characterizations of Planar Ga2O3 Schottky Barrier Diodes

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 259
Author(s):  
Shiyu Zhang ◽  
Zeng Liu ◽  
Yuanyuan Liu ◽  
Yusong Zhi ◽  
Peigang Li ◽  
...  
Keyword(s):  
Schottky Barrier ◽  
Carrier Concentration ◽  
Schottky Barrier Height ◽  
Electrical Parameters ◽  
Capacitance Voltage ◽  
Crystal Substrate ◽  
Electrical Characterizations ◽  
State Resistance ◽  
Current Stage ◽  
The Ideal

In this work, a Schottky barrier diode (SBD) is fabricated and demonstrated based on the edge-defined film-fed grown (EFG) Ga2O3 crystal substrate. At the current stage, for high resistance un-doped Ga2O3 films and/or bulk substrates, the carrier concentration (and other electrical parameters) is difficult to be obtained by using the conventional Hall measurement. Therefore, we extracted the electrical parameters such as on-state resistance (Ron), Schottky barrier height (ϕB), the ideal factor (n), series resistance (Rs) and the carrier concentration (Nd) by analyzing the current density–voltage (J–V) and capacitance–voltage (C–V) curves of the Ga2O3-based SBD, systematically. The detailed measurements and theoretical analysis are displayed in this paper.

Lognormal Lateral Distribution of Barrier Height in Au/n-GaAs Schottky Junctions?

1992 ◽  
Vol 260 ◽  
Author(s):  
ZS. J. Horváth
Keyword(s):  
Normal Distribution ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Schottky Barrier Height ◽  
Schottky Contacts ◽  
Point Of View ◽  
Lateral Distribution ◽  
Physical Point ◽  
Capacitance Voltage ◽  
Schottky Junctions

ABSTRACTExperimental capacitance-voltage (C-V) characteristics are presented for Au/n-GaAs Schottky contacts. The deviation of the obtained C-V characteristics from the theoretical one including the linear regions of the 1/Ca-V plot may be explained by either the normal or the lognormal lateral distribution of the barrier height. It is concluded that from physical point of view the lognormal lateral distribution of the Schottky barrier height proposed first in this work, is more likely than the normal distribution.

SiC MPS Devices: One Step Closer to the Ideal Diode

2018 ◽  
Vol 924 ◽  
pp. 609-612 ◽  
Author(s):  
Rudolf Elpelt ◽  
Mihai Draghici ◽  
Rolf Gerlach ◽  
Roland Rupp ◽  
Reinhold Schörner
Keyword(s):  
Schottky Barrier ◽  
Schottky Barrier Height ◽  
Cell Design ◽  
Metal System ◽  
One Step ◽  
Barrier Metal ◽  
Ideal Diode ◽  
New Generation ◽  
Schottky Rectifier ◽  
The Ideal

We report on the development of a new generation of SiC Schottky rectifier devices employing a Molybdenum based barrier metal system and a new stripe cell design for field shielding and optimized area utilization. The Schottky barrier height is reduced and thus the conduction losses are decreased significantly. The balance between forward conduction and reverse leakage losses as well as the homogeneity and stability of the new barrier system are investigated carefully.

Barrier Inhomogeneities of Mo Schottky Barrier Diodes on 4H-SiC

2010 ◽  
Vol 645-648 ◽  
pp. 227-230
Author(s):  
Marco Naretto ◽  
Denis Perrone ◽  
Sergio Ferrero ◽  
Luciano Scaltrito
Keyword(s):  
Schottky Barrier ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Electrical Characterization ◽  
Current Theory ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Barrier Inhomogeneities

In this work we present the results of electrical characterization of 4H-SiC power Schottky diodes with a Mo metal barrier for high power applications. A comparison between different Schottky Barrier Height (SBH) evaluation methods (capacitance-voltage and current-voltage measurements), together with the comparison with other authors’ works, indicates that thermionic current theory is the dominant transport mechanism across the barrier from room temperature (RT) to 450K, while at T < 300K some anomalies in J-V curves appear and SBH and ideality factor significantly change their values. These deviations from ideality are attributed to Schottky barrier inhomogeneities. In particular, a model based on two SBHs seems appropriate to properly describe the electrical behavior of our devices.

scholarly journals Extraction of the electrical parameters of the Au/InSb/InP Schottky diode in the temperature range (300 K- 425 K)

2020 ◽  
Vol 5 (1) ◽  
pp. 30
Author(s):  
Ali Sadoun
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Schottky Diode ◽  
Ideality Factor ◽  
Schottky Barrier Height ◽  
Theoretical Study ◽  
Series Resistance ◽  
Electrical Parameters ◽  
Temperature Range ◽  
Current Voltage

In this work, we have presented a theoretical study of  Au/InSb/InP Schottky diode based on current-voltage (I-V) measurement in the temperature range ( 300 K- 425 K). Electrical parameters of Au/InSb/InP such as barrier height (Φb), ideality factor and series resistance have been calculated by employing the conventional (I-V), Norde, Cheung and Chattopadhyay methods. Measurements show that the Schottky barrier height (SBH), ideality factor and series resistance, RS for Au/InSb/InP Schottky diode in the temperature range (300 K–425 K)  are 0.602-0.69eV, 1.683-1.234 and 84.54-18.95 (Ω), respectively. These parameters were extracted using Atlas-Silvaco-Tcad logical.

Extraction of Polarization-Induced Charge Density in Modulation-Doped AlxGa1-xN/GaN Heterostructures Based on Schottky C-V Simulation

2001 ◽  
Vol 693 ◽  
Author(s):  
Y.G. Zhou ◽  
B. Shen ◽  
H.Q. Yu ◽  
J. Liu ◽  
H.M. Zhou ◽  
...  
Keyword(s):  
Charge Density ◽  
Schottky Barrier ◽  
Barrier Height ◽  
Doping Level ◽  
Schottky Barrier Height ◽  
Partial Relaxation ◽  
Capacitance Voltage ◽  
Induced Charge Density ◽  
Induced Charge

AbstractA method based on Schottky capacitance-voltage (C-V) simulation was developed to extract the polarization-induced charge density in modulation-doped AlxGa1-xN/GaN heterostructures. There are two characteristic slopes in the experimental and simulated C-V curves.The influences of the polarization-induced charge density, n-AlGaN doping level and the Schottky barrier height on the positions of the two slopes in the C-V curves are much different from each other. The polarization-induced charge density can be extracted accurately by fitting the experimental C-V curves. It is extracted to be 6.78 x 1012cm-2in modulation-doped Al0.22Ga0.78N/GaN heterostructures with the Al0.22Ga0.78N thickness of 30 nm or 45 nm. The charge density reducesto 1.30 x 1012cm-2in the heterostructure with the Al0.22Ga0.78N thickness of 75 nm. It is thought that the reduction of the polarization-induced charges at the heterointerface is due to the partial relaxation of the Al0.22Ga0.78N layer on GaN.

Fabrication of 1.2kV, 100A, 4H-SiC(0001) and (000-1) Junction Barrier Schottky Diodes with Almost Same Schottky Barrier Height

2010 ◽  
Vol 645-648 ◽  
pp. 893-896 ◽  
Author(s):  
Akimasa Kinoshita ◽  
Takasumi Ohyanagi ◽  
Tsutomu Yatsuo ◽  
Kenji Fukuda ◽  
Hajime Okumura ◽  
...  
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Bias Voltage ◽  
Schottky Barrier Height ◽  
Annealing Temperature ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Leakage Currents ◽  
Forward Bias Voltage ◽  
The Ideal

It is known that a Schottky barrier height (b) of metal/C-face 4H-SiC Schottky barrier diode (SBD) differ from b of metal/Si-face 4H-SiC SBD. Furthermore, b of metal/4H-SiC SBD varies with annealing temperature. We fabricate 0.231mm2 SBD with Ti/SiC interface using Si-face and C-face 4H-SiC. These SBDs are annealed at several temperatures after a formation of the Ti/SiC interface. As a result, b of Ti/C-face 4H-SiC interface annealed at 400 oC is nearly equal to b of Ti/Si-face 4H-SiC interface annealed at 500 oC and the n-values of these SBDs are nearly equal to the ideal value (unity). Using that annealing condition, we fabricated 25mm2 junction barrier Schottky (JBS) diodes with Ti/SiC interface on Si-face and C-face 4H-SiC epitaxial substrate. b of Si-face and C-face JBS diodes are 1.26eV and 1.24eV, respectively. The leakage currents for both Si-face and C-face JBS diodes are less than 1mA/cm2. The current of 100A is obtained at the forward bias voltage of 1.95V and 2.16V for the Si-face JBS and the C-face JBS.

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