scholarly journals Comprehensive Research of Total Ionizing Dose Effects in GaN-Based MIS-HEMTs Using Extremely Thin Gate Dielectric Layer

Nanomaterials ◽  
2020 ◽  
Vol 10 (11) ◽  
pp. 2175
Author(s):  
Sung-Jae Chang ◽  
Dong-Seok Kim ◽  
Tae-Woo Kim ◽  
Jung-Hee Lee ◽  
Youngho Bae ◽  
...  

The device performance deterioration mechanism caused by the total ionizing dose effect after the γ-ray irradiation was investigated in GaN-based metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) for a 5 nm-thick SiN and HfO2 gate dielectric layer. The γ-ray radiation hardness according to the gate dielectric layer was also compared between the two different GaN-based MIS-HEMTs. Although HfO2 has exhibited strong tolerance to the total ionizing dose effect in Si-based devices, there is no detail report of the γ-ray radiation effects in GaN-based MIS-HEMTs employing a HfO2 gate dielectric layer. The pulsed-mode stress measurement results and carrier mobility behavior revealed that the device properties not only have direct current (DC) characteristics, but radio frequency (RF) performance has also been mostly degraded by the deterioration of the gate dielectric quality and the trapped charges inside the gate insulator. We also figured out that the immunity to the γ-ray radiation was improved when HfO2 was employed instead of SiN as a gate dielectric layer due to its stronger endurance to the γ-ray irradiation. Our results highlight that the application of a gate insulator that shows superior immunity to the γ-ray irradiation is a crucial factor for the improvement of the total ionizing dose effect in GaN-based MIS-HEMTs.

2014 ◽  
Vol 104 (18) ◽  
pp. 183507 ◽  
Author(s):  
Runchen Fang ◽  
Yago Gonzalez Velo ◽  
Wenhao Chen ◽  
Keith E. Holbert ◽  
Michael N. Kozicki ◽  
...  

Author(s):  
Yu-Shan Lin ◽  
Yi-Lin Chen ◽  
Ting-Chang Chang ◽  
Fong-Min Ciou ◽  
Qing Zhu ◽  
...  

Abstract In this work, a two-step degradation phenomenon in D-mode Si3N4/AlGaN/GaN metal-insulator-semiconductor high−electron−transistors (MIS−HEMT) is discussed systematically. During off−state stress, threshold voltage shifts positively for a short duration, and is followed by a negative shift. In contrast, the off−state leakage continues to decrease throughout the entire stress. Results of varied measurement conditions indicate that carrier trapping at different regions dominates this phenomenon. It is interesting that under a large lateral electric field, electron−hole pairs are generated and will then be trapped at the gate dielectric layer. Furthermore, when increasing the stress temperature, impact ionization due to carriers from the gate electrode becomes more severe. Finally, devices with different gate insulator (GI) thicknesses are performed to verify the physical model of the degradation behavior.


2005 ◽  
Vol 483-485 ◽  
pp. 713-716 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Phillippe Godignon ◽  
Narcis Mestres ◽  
Josep Montserrat ◽  
José Millan

Oxidized Ta2Si layers have been used as high-k dielectric layer for 4H-SiC MOSFETs. The gate insulator was grown by dry oxidation of 40nm deposited Ta2Si during 1h at 1050oC. The dielectric constant obtained from 4H-SiC MIS capacitors is ~20 with an insulator thickness of 150nm. These devices exhibit adequate subthreshold, saturation and drive characteristics. For the MOSFETs fabricated on a p-implanted and annealed region, a peak mobility up to 45cm2/Vs has been extracted. The specific on-resistance of this device is 29mW·cm2 at room temperature with VDS=0.2V and VGS=14V.


2019 ◽  
Vol 9 (17) ◽  
pp. 3610 ◽  
Author(s):  
Hwang ◽  
Jang ◽  
Kim ◽  
Lee ◽  
Lim ◽  
...  

This study investigates metal-insulator-semiconductor high electron mobility transistor DC characteristics with different gate dielectric layer compositions and thicknesses, and lattice temperature effects on gate leakage current by using a two-dimensional simulation. We first compared electrical properties, including threshold voltage, transconductance, and gate leakage current with the self-heating effect, by applying a single Si3N4 dielectric layer. We then employed different Al2O3 dielectric layer thicknesses on top of the Si3N4, and also investigated lattice temperature across a two-dimensional electron gas channel layer with various dielectric layer compositions to verify the thermal effect on gate leakage current. Gate leakage current was significantly reduced as the dielectric layer was added, and further decreased for a 15-nm thick Al2O3 on a 5-nm Si3N4 structure. Although the gate leakage current increased as Al2O3 thickness increased to 35 nm, the breakdown voltage was improved.


2018 ◽  
Vol 65 (1) ◽  
pp. 46-52 ◽  
Author(s):  
Maruf A. Bhuiyan ◽  
Hong Zhou ◽  
Sung-Jae Chang ◽  
Xiabing Lou ◽  
Xian Gong ◽  
...  

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