scholarly journals Automatic Joining of Electrical Components to Smart Textiles by Ultrasonic Soldering

Sensors ◽  
2021 ◽  
Vol 21 (2) ◽  
pp. 545 ◽  
Author(s):  
Sebastian Micus ◽  
Michael Haupt ◽  
Götz T. Gresser

A suitable connection method to automatically produce E-textiles does not exist. Ultrasonic soldering could be a good solution for that since it works with flux-free solder, which avoids embrittlement of the textile integrated wires. This article describes the detailed process of robot-assisted ultrasonic soldering of e-textiles to printed circuit boards (PCB). The aim is to understand the influencing factors affecting the connection and to determine the corresponding solder parameters. Various test methods are used to evaluate the samples, such as direct optical observation of the microstructure, a peeling tensile test, and a contact resistance measurement. The contact strength increases by reducing the operating temperature and the ultrasonic time. The lower operating temperature and the reduced ultrasonic time cause a more homogeneous metal structure with less defects improving the mechanical strength of the samples.

Author(s):  
Bhanu Sood ◽  
Michael Pecht

Abstract Failures in printed circuit boards account for a significant percentage of field returns in electronic products and systems. Conductive filament formation is an electrochemical process that requires the transport of a metal through or across a nonmetallic medium under the influence of an applied electric field. With the advent of lead-free initiatives, boards are being exposed to higher temperatures during lead-free solder processing. This can weaken the glass-fiber bonding, thus enhancing conductive filament formation. The effect of the inclusion of halogen-free flame retardants on conductive filament formation in printed circuit boards is also not completely understood. Previous studies, along with analysis and examinations conducted on printed circuit boards with failure sites that were due to conductive filament formation, have shown that the conductive path is typically formed along the delaminated fiber glass and epoxy resin interfaces. This paper is a result of a year-long study on the effects of reflow temperatures, halogen-free flame retardants, glass reinforcement weave style, and conductor spacing on times to failure due to conductive filament formation.


1984 ◽  
Vol 11 (3) ◽  
pp. 225-229
Author(s):  
E. Toth ◽  
P. Banlaki ◽  
I. Hajdu ◽  
J. Pinkola

The quality and reliability of multilayer boards are determined by the adhesion strength between the copper sheets and the epoxy-glass laminates. The adhesion properties of copper foil may be improved by mechanical or chemical roughening. The most efficient method is, however, to oxidize the copper surface.Oxidized copper layers have been tested by thermogravimetry. Subsequently the oxide layers have been tested by Auger and SIMS techniques. The results showed that the main constituent of the oxide layer produced in a sodium hypochlorite type electrolyte is Cu20.


2021 ◽  
Author(s):  
Ala Al Robiaee

As the global marketplaces consider mandating lead-free equipments, many questions arise about the impact and feasibility of replacing lead in printed circuit boards soldering applications. In this project, the results presented of a study on comparing the process of screening lead paste versus lead free paste parameters for regular stencil printing using standard manufacturing methods. The key process parameters studies were: squeegee speed, squeegee pressure, and screening yield for both types of pastes. Two solder paste formulations (lead paste and lead-free paste) were evaluated in this study. The analysis of the pastes deposit volumes showed that for normal manufacturing range of printer (screener) settings (speed and pressure) tested the two pastes performed the same. The results also showed that the squeegee speed has a greater effect on the printing process than the squeegee pressure. The tests clearly showed that the lead paste was affected more by setting changes compared to the lead free paste. Varying the print speed and pressure for type of pastes by observing the resulting printed paste volumes optimized screening parameters. This study confirms that a new stencil or stencil design is not needed for the lead free paste. However, this study recommends a change to the sitting of the screening print process. Stencil cleaning frequency is one of the main factors that impact the production rate in an SMT line. The project highlights new results that lead free paste throughput will be less compared to lead paste at the screening step. The number of rejected boards screened with lead free-paste exceeded normal manufacturing standards. As stencil cleaning is a must function, it was recommended to increase stencil wiping frequency when lead free paste [is] in use in order to obtain a consistent volume with less screening defect.


2011 ◽  
Vol 347-353 ◽  
pp. 2107-2111
Author(s):  
Hong Ting Ma ◽  
Guo Li Yang ◽  
Su Feng Hao

A typical printed circuit boards (PCBs) has been investigated by using thermo-gravimetric analyser to study its pyrolysis characteristics, the results indicate that the maximum weight loss rate occurs at temperature between 320°C and 360°C. A higher heating rate results in higher initial, final, peak temperature, and a longer process of significant weight loss. At the same pyrolysis temperature, heating rate has little effect on the total weight loss. In addition, 1kg PCBs based FR-4 was pyrolyzed in a fixed-bed reactor. The pyrolysis residues are very friable, the organic, glass fiber and metallic fractions can easily be separated, and the electrical components can easily be removed from the remains. Considering energy-saving, better control and design of the pyrolysis process, the optimal pyrolysis parameters were suggested at heating rate 10°C/min, final pyrolysis temperature 500°C and holding time 30 min.


Author(s):  
John Lau ◽  
Walter Dauksher

In many applications such as computers and telecommunications, the IC chip sizes are very big, the on-chip frequency and power dissipation are very high, and the number of chip I/Os is very large. The CCGA (ceramic column grid array) package developed by IBM is one of the best candidates for housing these kinds of chips [1–7]. There are two parts in this study. One is to show that the 2-parameter Weibull life distribution is adequate for modeling the thermal-fatigue life of lead-free solder joints. This is demonstrated by comparing the 2-parameter and 3-parameter Weibull distributions with life test data of an 1657-pin CCGA package with the 95.5wt%Sn3.9wt%Ag0.6wt%Cu lead-free solder paste on lead-free PCBs (printed circuit boards) under thermal cycling conditions. The other part of this study is to determine the time-history creep strain energy density of the 1657-pin CCGA solder column with two different solder paste materials, namely, 95.5wt%Sn3.9wt%Ag0.6wt%Cu and 63wt%Sn37wt%Pb and under three different thermal cycling profiles, namely, 25 ↔ 75°C, 0 ↔ 100°C, and −25 ↔ 125°C. The effects of these solder pastes and temperature conditions on the thermal-fatigue life of the high-lead (10wt%Sn90wt%Pb) solder columns of the CCGA package are provided and discussed.


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