80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications

2021 ◽  
Vol 60 (SB) ◽  
pp. SBBB06
Author(s):  
Alessio Spessot ◽  
Romain Ritzenthaler ◽  
Eugenio Dentoni Litta ◽  
Emmanuel Dupuy ◽  
Barry O’Sullivan ◽  
...  
Keyword(s):  
Artificial Intelligence ◽  
Machine Learning ◽  
Random Access ◽  
Random Access Memory ◽  
Cost Effective ◽  
Dynamic Random Access Memory ◽  
Thermally Stable ◽  
Automotive Applications ◽  
Access Memory

scholarly journals Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM

Micromachines ◽  
2020 ◽  
Vol 11 (2) ◽  
pp. 228
Author(s):  
Hyeonjeong Kim ◽  
Songyi Yoo ◽  
In-Man Kang ◽  
Seongjae Cho ◽  
Wookyung Sun ◽  
...  
Keyword(s):  
Three Dimensional ◽  
Random Access ◽  
Random Access Memory ◽  
Cost Effective ◽  
Dynamic Random Access Memory ◽  
Silicon On Insulator ◽  
Floating Body ◽  
Thin Body ◽  
Access Memory ◽  
The Cost

Recently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell’s data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell’s state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area.

MoO2 as a thermally stable oxide electrode for dynamic random-access memory capacitors

2018 ◽  
Vol 6 (48) ◽  
pp. 13250-13256 ◽  
Author(s):  
Woongkyu Lee ◽  
Cheol Jin Cho ◽  
Woo Chul Lee ◽  
Cheol Seong Hwang ◽  
Robert P. H. Chang ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Thermally Stable ◽  
Next Generation ◽  
Oxide Electrode ◽  
Access Memory ◽  
Excellent Thermal Stability ◽  
Stable Oxide

MoO2 is a promising oxide electrode with excellent thermal stability for next-generation DRAM capacitors.

Sub-6F2 Charge Trap Dynamic Random Access Memory Using a Novel Operation Scheme

2006 ◽  
Author(s):  
Zongliang Huo ◽  
Seungjae Baik ◽  
Shieun Kim ◽  
In-seok Yeo ◽  
U-in Chung ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Charge Trap

Analysis of Grain Boundary Dependent Memory Characteristics in Poly-Si One-Transistor Dynamic Random-Access Memory

2021 ◽  
Vol 21 (8) ◽  
pp. 4216-4222
Author(s):  
Songyi Yoo ◽  
In-Man Kang ◽  
Sung-Jae Cho ◽  
Wookyung Sun ◽  
Hyungsoon Shin
Keyword(s):  
Strong Electric Field ◽  
Memory Performance ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Thin Body ◽  
Memory Cells ◽  
Access Memory ◽  
Memory Characteristics

A capacitorless one-transistor dynamic random-access memory cell with a polysilicon body (poly-Si 1T-DRAM) has a cost-effective fabrication process and allows a three-dimensional stacked architecture that increases the integration density of memory cells. Also, since this device uses grain boundaries (GBs) as a storage region, it can be operated as a memory cell even in a thin body device. GBs are important to the memory characteristics of poly-Si 1T-DRAM because the amount of trapped charge in the GBs determines the memory’s data state. In this paper, we report on a statistical analysis of the memory characteristics of poly-Si 1T-DRAM cells according to the number and location of GBs using TCAD simulation. As the number of GBs increases, the sensing margin and retention time of memory cells deteriorate due to increasing trapped electron charge. Also, “0” state current increases and memory performance degrades in cells where all GBs are adjacent to the source or drain junction side in a strong electric field. These results mean that in poly-Si 1T-DRAM design, the number and location of GBs in a channel should be considered for optimal memory performance.

Pt/BaxSr(1-x)TiO3/Pt Capacitor Technology for 0.15 µm Embedded Dynamic Random Access Memory

2004 ◽  
Vol 43 (5A) ◽  
pp. 2457-2461 ◽  
Author(s):  
Yoshikazu Tsunemine ◽  
Tomonori Okudaira ◽  
Keiichiro Kashihara ◽  
Akie Yutani ◽  
Hiroki Shinkawata ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Access Memory
Sign in / Sign up

Export Citation Format

Share Document