scholarly journals Fully-Integrated Tunable Q-Enhanced Linear Low Noise Amplifier for Wireless Receivers

2020 ◽  
Vol 9 (3) ◽  
pp. 1762-1766
Keyword(s):  
Quality Factor ◽  
Tuning Range ◽  
Low Noise ◽  
Wireless Receivers ◽  
Center Frequency ◽  
Third Order ◽  
Fully Integrated ◽  
Noise Amplifier ◽  
Quality Factor Q ◽  
Peak Gain

This paper presents the design of a fully-integrated tunable Q-enhanced LNA resonator filter designed to tune the circuit center frequency and quality factor Q. The proposed circuit achieves a 600 MHz 3dB bandwidth tunable center frequency at 2.4 GHz with a 5.5 dB Quality Factor Q tuning range. The proposed circuit utilize a distortion transistor compensator to improve linearity of the circuit. The results show an 18 dBc of third order intermodulation IM3 cancellation. The overall proposed circuit peak gain is 16.5 dB and the minimum NF is 0.94 dB at 2.4 GHz frequency with power consumption of 5.2 mA

scholarly journals Broadband GaAs pHemt LNA design for T/R module application

2016 ◽  
Vol 54 (5) ◽  
pp. 584
Author(s):  
Phong Dai Le ◽  
Vu Duy Thong ◽  
Pham Le Binh
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Small Signal Gain ◽  
Small Signal ◽  
Third Order ◽  
Wide Bandwidth ◽  
Fully Integrated ◽  
Three Stages ◽  
Noise Amplifier

In this paper, a three stages monolithic low noise amplifier (LNA) for T/R module application is presented. This LNA is fully integrated on 0.15-um pHEMT GaAs technology and achieves a wide bandwidth from 6 GHz to 11 GHz. Within this band, the LNA has the minimum of 1.3 dB noise figure and over 25 dB small signal gain. The output third order interception point (OIP3) is over 30 dBm and the 1 dB compression point (P1 dB) is 16 dBm at the output.

Power Efficient Implementation of Low Noise CMOS LC VCO using 32nm Technology for RF Applications

2018 ◽  
Vol 6 (8) ◽  
pp. 53
Author(s):  
Shitesh Tiwari ◽  
Sumant Katiyal ◽  
Parag Parandkar
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Tuning Range ◽  
Low Voltage ◽  
Performance Comparison ◽  
Low Noise ◽  
Center Frequency ◽  
Voltage Controlled Oscillator ◽  
Low Phase Noise ◽  
Lc Vco

Voltage Controlled Oscillator (VCO) is an integral component of most of the receivers such as GSM, GPS etc. As name indicates, oscillation is controlled by varying the voltage at the capacitor of LC tank. By varying the voltage, VCO can generate variable frequency of oscillation. Different VCO Parameters are contrasted on the basis of phase noise, tuning range, power consumption and FOM. Out of these phase noise is dependent on quality factor, power consumption, oscillation frequency and current. So, design of LC VCO at low power, low phase noise can be obtained with low bias current at low voltage.  Nanosize transistors are also contributes towards low phase noise. This paper demonstrates the design of low phase noise LC VCO with 4.89 GHz tuning range from 7.33-11.22 GHz with center frequency at 7 GHz. The design uses 32nm technology with tuning voltage of 0-1.2 V. A very effective Phase noise of -114 dBc / Hz is obtained with FOM of -181 dBc/Hz. The proposed work has been compared with five peer LC VCO designs working at higher feature sizes and outcome of this performance comparison dictates that the proposed work working at better 32 nm technology outperformed amongst others in terms of achieving low Tuning voltage and moderate FoM, overshadowed by a little expense of power dissipation. 

Passive Components for RF-ICs

2012 ◽  
pp. 189-214
Author(s):  
Gianluca Cornetta ◽  
David J. Santos ◽  
José Manuel Vázquez
Keyword(s):  
Integrated Circuits ◽  
Quality Factor ◽  
Silicon Substrate ◽  
Supply Voltage ◽  
Magnetic Behavior ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Fully Integrated ◽  
Core Elements ◽  
Low Supply Voltage

The modern wireless communication industry is demanding transceivers with a high integration level operating in the gigahertz frequency range. This, in turn, has prompted intense research in the area of monolithic passive devices. Modern fabrication processes now provide the capability to integrate onto a silicon substrate inductors and capacitors, enabling a broad range of new applications. Inductors and capacitors are the core elements of many circuits, including low-noise amplifiers, power amplifiers, baluns, mixers, and oscillators, as well as fully-integrated matching networks. While the behavior and the modeling of integrated capacitors are well understood, the design of an integrated inductor is still a challenging task since its magnetic behavior is hard to predict accurately. As the operating frequency approaches the gigahertz range, device nonlinearities, coupling effects, and skin effect dominate, making difficult the design of critical parameters such as the self-resonant frequency, the quality factor, and self and mutual inductances. However, despite the parasitic effects and the low quality-factor, integrated inductors still allow for the implementation of integrated circuits with improved performances under low supply voltage. In this chapter, the authors review the technology behind monolithic capacitors and inductors on silicon substrate for high-frequency applications, with major emphasis on physical implementation and modeling.

scholarly journals 2.4 GHZ HETERODYNE RECEIVER FOR HEALTHCARE APPLICATION

2016 ◽  
Vol 8 (2) ◽  
pp. 22 ◽  
Author(s):  
Wei Cai ◽  
Frank Shi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Performance ◽  
Tuning Range ◽  
Low Noise ◽  
Heterodyne Receiver ◽  
The Third ◽  
Noise Amplifier ◽  
Lc Tank ◽  
Down Conversion

<p class="lead">The objective of this research was to design a basic 2.4 GHz heterodyne receiver for healthcare on a 130um CMOS process. The ultimate goal for the wireless industry is to minimize the trade-offs between performance and cost, and between performance and low power consumption design. In the first part, a low noise amplifier (LNA), which is commonly used as the first stage of a receiver, is introduced and simulated. LNA performance greatly affects the overall receiver performance. The LNA was designed at the 2.4 GHz ISM band, using the cascode with an inductive degeneration topology. The second part of this thesis presents a low power 2.4 GHz down conversion Gilbert Cell mixer. In the third part, a high-performance LC-tank CMOS VCO was designed at 2.4 GHz. The design uses using PMOS cross-coupled topology with the varactor for wider tuning range topology. In the first part, a low noise amplifier (LNA) design reaches the NF of 2 dB, has a power consumption of 2.2 mW, and has a gain of 20dB. The second part of this proposal presents a low power 2.4 GHz down conversion Gilbert Cell mixer. The obtained result shows a conversion gain of 14.6 dB and power consumption of 8.2 mW at a 1.3V supply voltage. In the third part, a high-performance LC-tank CMOS VCO was designed at 2.4 GHz. The final simulation of the phase noise is-128 dBc/Hz, and the tuning range is 2.3 GHz-2.5 GHz while the total power consumption is 3.25 mW.<strong> </strong>The performance of the receiver meets the specification requirements of the desired standard.</p>

Sign in / Sign up

Export Citation Format

Share Document