An Ultra-CompactOptical Modulator using Indium Tin Oxide Materialand Metal-Dielectric-Metal Waveguide Structure

These days Ultra-compact modulators are seeking so much interest in their research area, because these are the main components of optical transmission systems and also Ultracompact and ultra- high speed semiconductor electronic modulators are very significant for optoelectronic integrated circuits. The resonant modulators can be of very small size therefor we have proposed a compactIndium Tin Oxide (ITO) based Opto- Electronic Modulator in a Metal-Dielectric-Metal Plasmonic Waveguide Structure and utilizing resonance property in the device. The device has dimension of 0.01 μm3 and shows modulation depth approximately 9 dB near telecommunication wavelength of 1.5 μm. All the calculations had been done using Finite Element Method (FEM). We have also studied the applications of the device as a tunable filter near the telecommunication wavelength. Performance of the suggested device is quite acceptable with comparison to device size and considered valuable for photonic integrated circuit.

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TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100138713 ◽

1995 ◽

Vol 53 ◽

pp. 468-469

Author(s):

N. David Theodore ◽

Donald Y.C Lie ◽

J. H. Song ◽

Peter Crozier

Keyword(s):

Integrated Circuits ◽

Heterojunction Bipolar Transistors ◽

Integrated Circuit ◽

High Speed ◽

Room Temperature ◽

Strain Relaxation ◽

Bipolar Transistors ◽

Sige Hbt ◽

Integrated Circuit Manufacturing ◽

Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

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The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2005p0224 ◽

2005 ◽

Author(s):

Mark Kimball

Keyword(s):

Integrated Circuits ◽

Integrated Circuit ◽

High Speed ◽

Attenuation Factor ◽

Cost Effective ◽

Frequency Measurement ◽

Single Frequency ◽

Measurement Tool ◽

Probe Design ◽

Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

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Design, fabrication, and modeling of high-speed metal-semiconductor-metal (MSM) photodetectors with indium-tin-oxide (ITO) and Ti/Pt/Au contacts

10.1117/12.206898 ◽

1995 ◽

Cited By ~ 3

Author(s):

Christian Beaulieu ◽

Francois L. Gouin ◽

Julian P. Noad ◽

William Hartman ◽

Ewa Lisicka-Skrzek ◽

...

Keyword(s):

Tin Oxide ◽

Indium Tin Oxide ◽

High Speed ◽

Metal Semiconductor Metal ◽

Msm Photodetectors

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Laser direct imaging of transparent indium tin oxide electrodes using high speed stitching techniques

Optical Review ◽

10.1007/s10043-014-0120-z ◽

2014 ◽

Vol 21 (5) ◽

pp. 732-735 ◽

Cited By ~ 1

Author(s):

Pi-Ying Cheng ◽

Wen-Tse Hsiao ◽

Chien-Kai Chung ◽

Shih-Feng Tseng ◽

Ien-Chang Liao

Keyword(s):

Tin Oxide ◽

Indium Tin Oxide ◽

High Speed ◽

Direct Imaging ◽

Oxide Electrodes ◽

Stitching Techniques

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High-speed visible-blind GaN-based indium–tin–oxide Schottky photodiodes

Applied Physics Letters ◽

10.1063/1.1412592 ◽

2001 ◽

Vol 79 (17) ◽

pp. 2838-2840 ◽

Cited By ~ 54

Author(s):

Necmi Biyikli ◽

Tolga Kartaloglu ◽

Orhan Aytur ◽

Ibrahim Kimukin ◽

Ekmel Ozbay

Keyword(s):

Tin Oxide ◽

Indium Tin Oxide ◽

High Speed ◽

Visible Blind

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Passivity Preserving Model Order Reduction Using the Reduce Norm Method

Electronics ◽

10.3390/electronics9060964 ◽

2020 ◽

Vol 9 (6) ◽

pp. 964

Author(s):

Namra Akram ◽

Mehboob Alam ◽

Rashida Hussain ◽

Asghar Ali ◽

Shah Muhammad ◽

...

Keyword(s):

Integrated Circuits ◽

Integrated Circuit ◽

Model Order Reduction ◽

High Speed ◽

Order Reduction ◽

Reliable Operation ◽

Model Order ◽

Reduced Order ◽

Reduction Methods ◽

On Chip

Modeling and design of on-chip interconnect, the interconnection between the components is becoming the fundamental roadblock in achieving high-speed integrated circuits. The scaling of interconnect in nanometer regime had shifted the paradime from device-dominated to interconnect-dominated design methodology. Driven by the expanding complexity of on-chip interconnects, a passivity preserving model order reduction (MOR) is essential for designing and estimating the performance for reliable operation of the integrated circuit. In this work, we developed a new frequency selective reduce norm spectral zero (RNSZ) projection method, which dynamically selects interpolation points using spectral zeros of the system. The proposed reduce-norm scheme can guarantee stability and passivity, while creating the reduced models, which are fairly accurate across selected narrow range of frequencies. The reduced order results indicate preservation of passivity and greater accuracy than the other model order reduction methods.

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Flip Chip Underfill RF Characterization

International Symposium on Microelectronics ◽

10.4071/2380-4505-2019.1.000243 ◽

2019 ◽

Vol 2019 (1) ◽

pp. 000243-000247

Author(s):

Robert B. Paul ◽

A. Ege Engin ◽

Jerry Aguirre

Keyword(s):

Integrated Circuits ◽

Integrated Circuit ◽

High Speed ◽

Flip Chip ◽

Power Integrity ◽

Cavity Resonators ◽

Dielectric Characterization ◽

Noise Coupling ◽

Solder Bumps ◽

Underfill Material

Abstract To develop reliable high-speed packages, characterization of the underfill material used in the flip-chip process has become of greater importance. The underfill, typically an epoxy resin-based material, offers thermal and structural benefits for the integrated circuit (IC) on package. With so many inputs and outputs (IOs) in close proximity to one another, the integrated circuits on package can have unexpected signal and power integrity issues. Furthermore, chip packages can support signals only up to the frequency where noise coupling (e.g., crosstalk, switching noise, etc.) leads to the malfunctioning of the system. Vertical interconnects, such as vias and solder bumps, are major sources of noise coupling. Inserting ground references between every signal net is not practical. For the solder bumps, the noise coupling depends on the permittivity of the underfill material. Therefore, characterizing the permittivity of the underfill material helps in predicting signal and power integrity issues. Such liquid or semi-viscous materials are commonly characterized from a simple fringe capacitance model of an open-ended coaxial probe immersed in the material. The open-ended coaxial method, however, is not as accurate as resonator-based methods. There is a need for a methodology to accurately extract the permittivity of liquid or semi-viscous materials at high frequencies. The proposed method uses solid walled cavity resonators, where the resonator is filled with the underfill material and cured. Dielectric characterization is a complex process, where the physical characteristics of the cavities must be known or accurately measured. This includes the conductivity of the conductors, roughness of the conductors, the dimensions of the cavity, and the port pin locations. This paper discusses some of the challenges that are encountered when characterizing dielectrics with cavity resonators. This characterization methodology can also be used to characterize other materials of interest.

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