scholarly journals Design of IRNSS Tracking System using 1.5 bit ADPLL and Correlator

IRNSS is an indigenous satellite navigation system consisting of 7 satellites that provide accurate positioning in the Indian sub-continent region. Each IRNSS satellite transmits a signal which contains information regarding satellite orbital and clock parameters (known as navigation message). The purpose of the receiver is to demodulate the satellite signal and extract navigation message, the receiver must know certain parameters of the signal like its doppler shift and code offset. However, in real-time, due to relative velocity of the satellite and ionospheric interference, these parameters vary with time. Therefore, the receiver must continuously perform the tracking operation to update the varying parameters. Existing tracking systems are based on SDR and SoC’s, which require high-performance processors and iterative algorithms to perform both carrier and phase tracking. Though they are highly accurate, these designs are complex and expensive. In this paper, 1.5-bit ADPLL is used to track the carrier. This design does not require numerous computational loops to perform tracking of the carrier, thus reducing the complexity of the design. This work includes simulation results for 1.5-bit ADPLL. In this work, 2-bit, 1.5-bit, and modified 1.5-bit correlators are simulated and synthesized. It was found that modified 1.5-bit correlator architecture is less complex compared to 2-bit correlator and offers better SNR compared to 1.5-bit correlator. Therefore, modified 1.5-bit correlator is used for code tracking. The IRNSS signal tracking is performed in ModelSim. The system utilizes 77 standard LUTs and exhibit maximum settling time of 714µs and 31.28ms for carrier tracking and code tracking, respectively.

Sensors ◽  
2021 ◽  
Vol 21 (8) ◽  
pp. 2715
Author(s):  
Ruth Yadira Vidana Morales ◽  
Susana Ortega Cisneros ◽  
Jose Rodrigo Camacho Perez ◽  
Federico Sandoval Ibarra ◽  
Ricardo Casas Carrillo

This work illustrates the analysis of Film Bulk Acoustic Resonators (FBAR) using 3D Finite Element (FEM) simulations with the software OnScale in order to predict and improve resonator performance and quality before manufacturing. This kind of analysis minimizes manufacturing cycles by reducing design time with 3D simulations running on High-Performance Computing (HPC) cloud services. It also enables the identification of manufacturing effects on device performance. The simulation results are compared and validated with a manufactured FBAR device, previously reported, to further highlight the usefulness and advantages of the 3D simulations-based design process. In the 3D simulation results, some analysis challenges, like boundary condition definitions, mesh tuning, loss source tracing, and device quality estimations, were studied. Hence, it is possible to highlight that modern FEM solvers, like OnScale enable unprecedented FBAR analysis and design optimization.


Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 288
Author(s):  
Adam Wolniakowski ◽  
Charalampos Valsamos ◽  
Kanstantsin Miatliuk ◽  
Vassilis Moulianitis ◽  
Nikos Aspragathos

The determination of the optimal position of a robotic task within a manipulator’s workspace is crucial for the manipulator to achieve high performance regarding selected aspects of its operation. In this paper, a method for determining the optimal task placement for a serial manipulator is presented, so that the required joint torques are minimized. The task considered comprises the exercise of a given force in a given direction along a 3D path followed by the end effector. Given that many such tasks are usually conducted by human workers and as such the utilized trajectories are quite complex to model, a Human Robot Interaction (HRI) approach was chosen to define the task, where the robot is taught the task trajectory by a human operator. Furthermore, the presented method considers the singular free paths of the manipulator’s end-effector motion in the configuration space. Simulation results are utilized to set up a physical execution of the task in the optimal derived position within a UR-3 manipulator’s workspace. For reference the task is also placed at an arbitrary “bad” location in order to validate the simulation results. Experimental results verify that the positioning of the task at the optimal location derived by the presented method allows for the task execution with minimum joint torques as opposed to the arbitrary position.


2012 ◽  
Vol 542-543 ◽  
pp. 769-774
Author(s):  
Qun Ling Yu ◽  
Na Bai ◽  
Yan Zhou ◽  
Rui Xing Li ◽  
Jun Ning Chen ◽  
...  

A new technique for reducing the offset of latch-type sense amplifier has been proposed and effect of enable signal voltage upon latch-type sense amplifier offset in SRAM has been investigated in this paper. Circuit simulation results on both StrongARM and Double-tail topologies show that the standard deviation of offset can be reduced by 31.23% (StrongARM SA) and 25.2% (Double-tail SA) , respectively, when the voltage of enable signal reaches 0.6V in TSMC 65nm CMOS technology. For a column of bit-cell (1024 bit-cell), the total speed is improved by 14.98% (StrongARAM SA) and 22.26% (Double-tail SA) at the optimal operation point separately, and the total energy dissipation is reduced by 30.45% and 29.47% with this scheme.


2015 ◽  
Vol 787 ◽  
pp. 893-898
Author(s):  
Suneetha Racharla ◽  
K. Rajan ◽  
K.R. Senthil Kumar

Recently renewable energy sources have gained much attention as a clean energy. But the main problem occurs with the varying nature with the day and season. Aim of this paper is to conserve the energy, of the natural resources. For solar energy resource, the output induced in the photovoltaic (PV) modules depends on solar radiation and temperature of the solar cells. To maximize the efficiency of the system it is necessary to track the path of sun in order to keep the panel perpendicular to the sun. This paper proposes the design and construction of a microcontroller-based solar panel tracking system. The fuzzy controller aims at maximizing the efficiency of PV panel by focusing the sunlight to incident perpendicularly to the panel. The system consists of a PV panel which can be operated with the help of DC motor, four LED sensors placed in different positions and a fuzzy controller which takes the input from sensors and gives output speed to motor. A prototype is fabricated to test the results and compared with the simulation results. The results show the improved performance by using a tracking system


Author(s):  
Diego Jesus Serrano-Carrasco ◽  
Antonio Jesus Diaz-Honrubia ◽  
Pedro Cuenca

AbstractWith the advent of smartphones and tablets, video traffic on the Internet has increased enormously. With this in mind, in 2013 the High Efficiency Video Coding (HEVC) standard was released with the aim of reducing the bit rate (at the same quality) by 50% with respect to its predecessor. However, new contents with greater resolutions and requirements appear every day, making it necessary to further reduce the bit rate. Perceptual video coding has recently been recognized as a promising approach to achieving high-performance video compression and eye tracking data can be used to create and verify these models. In this paper, we present a new algorithm for the bit rate reduction of screen recorded sequences based on the visual perception of videos. An eye tracking system is used during the recording to locate the fixation point of the viewer. Then, the area around that point is encoded with the base quantization parameter (QP) value, which increases when moving away from it. The results show that up to 31.3% of the bit rate may be saved when compared with the original HEVC-encoded sequence, without a significant impact on the perceived quality.


This work investigates the performance of SiGe Hybrid JunctionLess FinFET (HJLFinFET) on insulator with different mole fraction x. The band gap difference for different mole fractions are explored. Impact of electrical characteristics and SCE of HJLFinFET are analyzed with fin width 10nm and varying gate length from 5nm-40nm for different mole fraction. Synopsys Sentaurus TCAD tool(sprocess and sdevice) are used in Device modelling and device simulation. Simulation results shows improvement in On current, DIBL and SS. For high performance application SiGe with mole fraction less than 0.3 at channel length less than 10nm are suitable because of the bandgap value is similar to silicon.


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