scholarly journals Gate Driver Circuits With Discrete Components For GaN-based Multi-Level Multi-Inductor Hybrid Converter

2021 ◽  
Author(s):  
Ratul Das ◽  
Hanh-Phuc Le
Keyword(s):  
Power Converter ◽  
Multilevel Converters ◽  
Power Mosfets ◽  
Trade Offs ◽  
Power Modules ◽  
Power Switches ◽  
Gate Driver ◽  
Multi Level ◽  
Gate Driving ◽  
Gate Drivers

<p>Gate driver circuits to ensure proper turn-on and turn-off for power switches are essential parts of a power converter design. They become even more important for multilevel converters where multiple switches are operated at active voltage domains. Recent favorable use of Gallium-Nitride (GaN) devices for power switches makes gate driving even more challenging as the switch performance and reliability are more sensitive to variations of the gate driving signals and power compared with traditional power MOSFETs. This paper discusses gate driving methods using a multi-level multi-inductor hybrid (MIH) converter as the demonstration prototype to address two key challenges in designing gate drivers: 1) providing level-shifted PWM signals to active voltage domains and 2) powering schemes for gate driver circuits. To solve the first challenge, an optimal use of available half-bridge drivers is devised to eliminate the need for separate signal isolator chips. This method was implemented and verified in a MIH converter prototype for 48-V Point-of-Load (PoL) applications using three different powering schemes for gate drivers, including isolated power modules, regulated supplies from switch blocking voltages, and cascaded bootstrap power rails with regulations. The gate driver techniques and powering schemes are compared experimentally in terms of performance to illustrate their benefits and trade-offs.</p>

scholarly journals Gate Driver Circuits With Discrete Components For GaN-based Multi-Level Multi-Inductor Hybrid Converter

2021 ◽  
Author(s):  
Ratul Das ◽  
Hanh-Phuc Le
Keyword(s):  
Power Converter ◽  
Multilevel Converters ◽  
Power Mosfets ◽  
Trade Offs ◽  
Power Modules ◽  
Power Switches ◽  
Gate Driver ◽  
Multi Level ◽  
Gate Driving ◽  
Gate Drivers

<p>Gate driver circuits to ensure proper turn-on and turn-off for power switches are essential parts of a power converter design. They become even more important for multilevel converters where multiple switches are operated at active voltage domains. Recent favorable use of Gallium-Nitride (GaN) devices for power switches makes gate driving even more challenging as the switch performance and reliability are more sensitive to variations of the gate driving signals and power compared with traditional power MOSFETs. This paper discusses gate driving methods using a multi-level multi-inductor hybrid (MIH) converter as the demonstration prototype to address two key challenges in designing gate drivers: 1) providing level-shifted PWM signals to active voltage domains and 2) powering schemes for gate driver circuits. To solve the first challenge, an optimal use of available half-bridge drivers is devised to eliminate the need for separate signal isolator chips. This method was implemented and verified in a MIH converter prototype for 48-V Point-of-Load (PoL) applications using three different powering schemes for gate drivers, including isolated power modules, regulated supplies from switch blocking voltages, and cascaded bootstrap power rails with regulations. The gate driver techniques and powering schemes are compared experimentally in terms of performance to illustrate their benefits and trade-offs.</p>

Design of High-Performance Synchronous Buck DC-DC Converters Using GaN Power HEMTs

2012 ◽  
Vol 717-720 ◽  
pp. 1307-1310
Author(s):  
Krishna Shenai ◽  
Krushal Shah
Keyword(s):  
High Performance ◽  
Figure Of Merit ◽  
Low Voltage ◽  
State Of The Art ◽  
Power Converter ◽  
Power Mosfets ◽  
Switching Losses ◽  
Power Switches ◽  
Load Regulation ◽  
Application Specific

Simple, physics-based, and accurate circuit models are reported for GaN power HEMTs and inductors; these models are then used to design high-performance chip-scale synchronous buck (SB) power converters to provide agile point-of-load (POL) low-voltage ( down to 1V) high-current (up to 10A) power to portable mobile devices from a battery. Excellent agreement between the measured and simulated results is demonstrated for load regulation for a 19V/1.2V, 800 kHz SB converter; for comparison, the same converter performance using the best commercially available state-of-the-art silicon power MOSFETs is also evaluated. It is shown that the conventional approach used for estimating power loss of a SB power converter is in error; a new application-specific Figure of Merit (FOM) for power switches is proposed that accounts for both input and output switching losses.

scholarly journals FPGA Based Symmetrical Multi Level Inverter with Reduced Gate Driver Circuits

2018 ◽  
Vol 6 (1) ◽  
pp. 53
Author(s):  
G. Durga Prasad ◽  
V Jegathesan
Keyword(s):  
High Voltage ◽  
High Power ◽  
Output Voltage ◽  
Experimental Results ◽  
Sinusoidal Wave ◽  
Font Size ◽  
Multilevel Converters ◽  
Dc Voltage ◽  
Gate Driver ◽  
Multi Level

<span style="font-size: 9pt; font-family: 'Times New Roman', serif;">Multilevel converters tender advantages in terms of the output waveform quality due to the increased number of levels used in the output voltage modulation and have been widely accepted for high-power high-voltage applications.  This paper introduces topology in multilevel dc link inverter (MLDCLI), which can significantly reduce the switch count and improve the performance.<strong> </strong>The preferred topology provides a dc voltage with the shape of a staircase approximating the rectified shape of a commanded sinusoidal wave, to the bridge inverter, which in turn gives the required alternating waveform<strong>.</strong> This topology requires fewer components compared to traditional Multi level Inverters (MLI).Therefore, the overall cost and complexity are significantly reduced particularly for higher output voltage levels. Finally, </span><span style="font-size: 9pt; font-family: 'Times New Roman', serif;" lang="EN-GB">Matlab/Simulink and XILINX are used as a simulation and compiler architecture of control circuit embedded in FPGA. Simulation and experimental results for fifteen-level inverter are presented for validation</span><span style="font-size: 9pt; font-family: 'Times New Roman', serif;">.</span>

scholarly journals A special high-frequency soft-switched DC/DC power supply for GCT gate driver

2021 ◽  
Author(s):  
Jahangir Afsharian
Keyword(s):  
Power Supply ◽  
High Frequency ◽  
Optimization Procedure ◽  
Power Supplies ◽  
Zero Voltage Switching ◽  
General Power ◽  
Gate Driver ◽  
Isolation Transformer ◽  
Experimental Use ◽  
Gate Drivers

This thesis is devoted to the development of a novel parallel isolated power supply (PIPS) for the gate driver of integrated Gate Commutated Thyristors (GCT). The proposed PIPS is essentially a special high frequency soft switched DC/DC converter, integrating six parallel isolated power supplies in one module where each power supply generates a regulated dc supply for the GCT gate driver. In commercial GCT power supplies, a high-voltage isolation transformer is indispensable but highly inefficient in terms of cost and size, which can be significantly improved by the optimized transformer. In all, this design strives to achieve a general power supply for powering up the gate drivers of all types of GCT devices in all MV applications with minimal changes in configuration. In this thesis, the configuration of PIPS is presented and its operating principle is elaborated. The transformer optimization procedure satisfying the voltage isolation requirement of GCT gate drivers is extensively discussed. The performance of PIPS, including the front end DC/DC converter, zero voltage switching phase-shift full bridge (ZVS-PS-FB) converter, and the optimization of the transformer, is verified by simulations and experiments where a 360W laboratory prototype is built for the experimental use.

scholarly journals Asymmetrical four-wire cascaded h-bridge multi-level inverter based shunt active power filter supplied by a photovoltaic source

2021 ◽  
Vol 12 (3) ◽  
pp. 1673
Author(s):  
Kamel Saleh ◽  
Omar Mahmoud
Keyword(s):  
Reactive Power ◽  
Dimensional Space ◽  
Active Power Filter ◽  
Power Converter ◽  
Open Circuit ◽  
Active Power ◽  
Nonlinear Load ◽  
Shunt Active Power Filter ◽  
Power Filter ◽  
Multi Level

<span>This paper presents a novel shunt active power filter (SAPF). The power converter that is used in this SAPF is constructed from a four-leg asymmetric multi-level cascaded H-bridge (CHB) inverter that is fed from a photovoltaic source. A three-dimensional space vector modulation (3D-SVPWM) technique is adopted in this work. The multi-level inverter can generate 27-level output with harmonic content is almost zero. In addition to the capability to inject reactive power and mitigating the harmonics, the proposed SAPF has also, the ability to inject real power as it is fed from a PV source. Moreover, it has a fault-tolerant capability that makes the SAPF maintaining its operation under a loss of one leg of the multi-level inverter due to an open-circuit fault without any degradation in the performance. The proposed SAPF is designed and simulated in MATLAB SIMULINK using a single nonlinear load and the results have shown a significant reduction in total harmonics distortion (THD) of the source current under the normal operating condition and post a failure in one phase of the SAPF. Also, similar results are obtained when IEEE 15 bus network is used.</span>

scholarly journals Asymmetrical ZVS-PWM Switched-Capacitor Based Half-Bridge DC-DC Converter With Switch Peak Voltage of Vin/2

2020 ◽  
Author(s):  
Angelica Paula Caus ◽  
Guilherme Martins Leandro ◽  
Ivo Barbi
Keyword(s):  
Theoretical Analysis ◽  
Power Converter ◽  
Maximum Efficiency ◽  
Switching Frequency ◽  
Switched Capacitor ◽  
Peak Voltage ◽  
Zero Voltage Switching ◽  
Power Switches ◽  
Converter Topology ◽  
Bus Voltage

This paper presents a new power converter topology<br>generated by the integration of the asymmetrical ZVS-PWM dcdc converter with a switched-capacitor ladder-type commutation<br>cell. Circuit operation and theoretical analysis with emphasis on<br>the soft-commutation process are included in the paper. The<br>main advantage of the proposed converter with respect to the<br>conventional asymmetrical half-bridge dc-dc converter is the<br>reduction of the voltage stress across the power switches to the<br>half of the input dc bus voltage, enabling the utilization of lower<br>voltage rating components. Experiments conducted on a<br>laboratory prototype with 1.4 kW power-rating, 800 V input<br>voltage, 48 V output voltage and 100 kHz switching frequency<br>are included, to verify the theoretical analysis and the design<br>methodology. The maximum efficiency of the experimental nonoptimized prototype was 93.6%.<br>Index Terms - Asymmetrical dc-dc converter, pulse-widthmodulation, switched-capacitor, zero voltage switching.<div><br><br></div>

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