scholarly journals High Density RDL Technologies for Panel Level Packaging of Embedded Dies

2021 ◽  
Vol 34 (2) ◽  
pp. 23-29
Author(s):  
Lars Boettcher ◽  
S. Kosmider ◽  
F. Schein ◽  
R. Kahle ◽  
A. Ostmann
Keyword(s):  
Coefficient Of Thermal Expansion ◽  
Measurement Data ◽  
Combine Application ◽  
Additive Process ◽  
The Real ◽  
Adaptive Imaging ◽  
Fine Pitch ◽  
Strong Focus ◽  
Application Logic ◽  
With Memory

The ongoing miniaturization and functional heterogeneity in electronics packaging are pushing the demand for advanced substrate technologies. Highly integrated, advanced multi-chip packaging solutions combine application, logic and computing dies with memory or components for power management in a single package. A solution to achieve low fabrication costs is the close embedding of thin dies in IC Substrates based on large formats (600 x 600 mm²), known from PCB fabrication. In a consortium of partners from industry and research advanced technologies for Panel Level Packaging (PLP) are developed. This paper will show the development of 5µm L/S RDL routing density and chips with 50µm bump pitch. Here, the 6x6 mm² dies are symmetrically embedded into an organic laminate matrix. A PCB core (100µm thickness) with very low coefficient of thermal expansion (CTE) containing laser cut cavities is used, acting as a frame layer. Besides mechanical and handling stability, the usage of such a frame offers the advantage of pre-integrating additional features like local fiducials, through vias or power lines by conventional PCB processes. Within that frame, the dies are embedded by lamination of an organic build-up film with 25µm thickness equal to bump height. The chip contacts are then opened without the need of any micro via formation. Here a strong focus is set on RIE etching of the polymer material. Highly accurate measurement of the real die position is essential for the following processing. The formation of the redistribution layer (RDL) is done in a semi-additive process (SAP) utilizing sputtering technique and direct imaging (LDI). To achieve the fine pitch demands, an adaptive imaging process is applied. Therefore, a newly developed LDI machine is used to write structures in a 7µm photoresist. This exposure also combines the measurement data of the real die position and the adaption of the exposure artwork, in order to achieve highest registration quality.

scholarly journals Reliability Evaluation of Fan-Out Type 3D Packaging-On-Packaging

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 295
Author(s):  
Pao-Hsiung Wang ◽  
Yu-Wei Huang ◽  
Kuo-Ning Chiang
Keyword(s):  
Finite Element ◽  
Thermal Cycling ◽  
Glass Substrate ◽  
High Speed ◽  
Coefficient Of Thermal Expansion ◽  
Three Dimensional ◽  
Design Parameters ◽  
Time To Failure ◽  
Wafer Level ◽  
Fine Pitch

The development of fan-out packaging technology for fine-pitch and high-pin-count applications is a hot topic in semiconductor research. To reduce the package footprint and improve system performance, many applications have adopted packaging-on-packaging (PoP) architecture. Given its inherent characteristics, glass is a good material for high-speed transmission applications. Therefore, this study proposes a fan-out wafer-level packaging (FO-WLP) with glass substrate-type PoP. The reliability life of the proposed FO-WLP was evaluated under thermal cycling conditions through finite element simulations and empirical calculations. Considering the simulation processing time and consistency with the experimentally obtained mean time to failure (MTTF) of the packaging, both two- and three-dimensional finite element models were developed with appropriate mechanical theories, and were verified to have similar MTTFs. Next, the FO-WLP structure was optimized by simulating various design parameters. The coefficient of thermal expansion of the glass substrate exerted the strongest effect on the reliability life under thermal cycling loading. In addition, the upper and lower pad thicknesses and the buffer layer thickness significantly affected the reliability life of both the FO-WLP and the FO-WLP-type PoP.

scholarly journals Optimal Temperature-Based Condition Monitoring System for Wind Turbines

2021 ◽  
Vol 6 (4) ◽  
pp. 50
Author(s):  
Payam Teimourzadeh Baboli ◽  
Davood Babazadeh ◽  
Amin Raeiszadeh ◽  
Susanne Horodyvskyy ◽  
Isabel Koprek
Keyword(s):  
Monitoring System ◽  
Wind Turbines ◽  
Wind Farm ◽  
Measurement Data ◽  
Real Data ◽  
Offshore Wind ◽  
Risk Indicator ◽  
Real World Data ◽  
The Real ◽  
Data Driven Modeling

With the increasing demand for the efficiency of wind energy projects due to challenging market conditions, the challenges related to maintenance planning are increasing. In this paper, a condition-based monitoring system for wind turbines (WTs) based on data-driven modeling is proposed. First, the normal condition of the WTs key components is estimated using a tailor-made artificial neural network. Then, the deviation of the real-time measurement data from the estimated values is calculated, indicating abnormal conditions. One of the main contributions of the paper is to propose an optimization problem for calculating the safe band, to maximize the accuracy of abnormal condition identification. During abnormal conditions or hazardous conditions of the WTs, an alarm is triggered and a proposed risk indicator is updated. The effectiveness of the model is demonstrated using real data from an offshore wind farm in Germany. By experimenting with the proposed model on the real-world data, it is shown that the proposed risk indicator is fully consistent with upcoming wind turbine failures.

Estimation of Track Irregularity Based on Genetic Algorithm and Unscented Kalman Filtering

2012 ◽  
Author(s):  
Hongmei Shi ◽  
Zujun Yu
Keyword(s):  
Genetic Algorithm ◽  
Kalman Filtering ◽  
High Speed ◽  
Measurement Data ◽  
Estimation Method ◽  
Coupling Model ◽  
Dynamic Responses ◽  
The Real ◽  
True Value ◽  
Track Irregularity

Track irregularity is the main excitation source of wheel-track interaction. Due to the difference of speed, axle load and suspension parameters between track inspection train and the operating trains, the data acquired from the inspection car cannot completely reflect the real status of track irregularity when the operating trains go through the rail. In this paper, an estimation method of track irregularity is proposed using genetic algorithm and Unscented Kalman Filtering. Firstly, a vehicle-track vertical coupling model is established, in which the high-speed vehicle is assumed as a rigid body with two layers of spring and damping system and the track is viewed as an elastic system with three layers. Then, the static track irregularity is estimated by genetic algorithm using the vibration data of vehicle and dynamic track irregularity which are acquired from the inspection car. And the dynamic responses of vehicle and track can be solved if the static track irregularity is known. So combining with vehicle track coupling model of different operating train, the potential dynamic track irregularity is solved by simulation, which the operating train could goes through. To get a better estimation result, Unscented Kalman Filtering (UKF) algorithm is employed to optimize the dynamic responses of rail using measurement data of vehicle vibration. The simulation results show that the estimated static track irregularity and the vibration responses of vehicle track system can go well with the true value. It can be realized to estimate the real rail status when different trains go through the rail by this method.

scholarly journals Reversals in the large-scale αΩ-dynamo with memory

2015 ◽  
Vol 22 (4) ◽  
pp. 361-369 ◽  
Author(s):  
L. K. Feschenko ◽  
G. M. Vodinchar
Keyword(s):  
Magnetic Field ◽  
Power Law ◽  
Geomagnetic Field ◽  
Large Scale ◽  
Magnetic Polarity ◽  
Power Law Model ◽  
The Real ◽  
Geomagnetic Polarity ◽  
With Memory ◽  
The Magnetic Field

Abstract. Inversion of the magnetic field in a model of large-scale αΩ-dynamo with α-effect with stochastic memory is under investigation. The model allows us to reproduce the main features of the geomagnetic field reversals. It was established that the polarity intervals in the model are distributed according to the power law. Model magnetic polarity timescale is fractal. Its dimension is consistent with the dimension of the real geomagnetic polarity timescale.

scholarly journals Is There Opportunity Without Stakeholders? A Stakeholder Theory Critique and Development of Opportunity-Actualization

2021 ◽  
pp. 104225872110433
Author(s):  
Stratos Ramoglou ◽  
Stelios Zyglidopoulos ◽  
Foteini Papadopoulou
Keyword(s):  
Stakeholder Theory ◽  
Real World ◽  
Environmental Conditions ◽  
Opportunity Theory ◽  
The Real ◽  
Economic Opportunities ◽  
Narrow Focus ◽  
Strong Focus ◽  
Entrepreneurial Action ◽  
Business Venturing

How can stakeholder theory contribute to opportunity theory? We suggest that stakeholder theory affords appropriate theoretical lenses for grounding the opportunity-actualization perspective more firmly within the real-world constraints of business venturing. Actualization departs from a strong focus on entrepreneurial agency to conceptualize how pre-existing environmental conditions determine what entrepreneurial action can achieve. We explain that stakeholder theory can strengthen the outward-looking orientation of actualization by (1) bringing the entirety of stakeholders centre-stage, beyond a narrow focus on market stakeholders, and (2) stressing the importance of noneconomic considerations for the actualization of economic opportunities. Our theorization culminates in the concept of ‘strategic opportunity thinking’ (SOT). We conceptualize SOT as a way of protecting entrepreneurs from the blind-to-stakeholders mindset that either sleepwalks them into the territory of non-opportunity or prevents them from the actualization of real yet difficult-to-actualize opportunities in the absence of stakeholder-centric thinking.

Advanced Build-up Materials for High Speed Transmission Application

2018 ◽  
Vol 2018 (1) ◽  
pp. 000305-000309 ◽  
Author(s):  
Shiro Tatsumi ◽  
Shohei Fujishima ◽  
Hiroyuki Sakauchi
Keyword(s):  
High Speed ◽  
Printed Circuit Boards ◽  
Transmission Loss ◽  
Coefficient Of Thermal Expansion ◽  
Strip Line ◽  
Circuit Boards ◽  
Additive Process ◽  
Printed Circuit ◽  
Low Dielectric ◽  
Transmission Speed

Abstract Build-up process is a highly effective method for miniaturization and high density integration of printed circuit boards. Along with increasing demands for high transmission speed of electronic devices with high functionality, packaging substrates installed with semiconductors in such devices are strongly required to reduce the transmission loss. Our insulation materials are used in a semi-additive process (SAP) with low dielectric loss tangent, smooth resin surface after desmear, and good insulation reliability. Actually, the transmission loss of strip line substrates and Cu surface roughness impact on transmission loss were measured using our materials. Furthermore, low dielectric molding film with low coefficient of thermal expansion (CTE) and low Young's modulus are introduced.

Advanced Build-up Materials and Processes for Packages with Fine Line and Space

2014 ◽  
Vol 2014 (1) ◽  
pp. 000444-000447 ◽  
Author(s):  
Yoshio Nishimura ◽  
Hirohisa Narahashi ◽  
Shigeo Nakamura ◽  
Tadahiko Yokota
Keyword(s):  
Printed Circuit Boards ◽  
Coefficient Of Thermal Expansion ◽  
High Reliability ◽  
Electronic Devices ◽  
Circuit Boards ◽  
Additive Process ◽  
Fine Line ◽  
Printed Circuit ◽  
Low Dielectric ◽  
Line Space

Printed circuit boards manufactured by a semi-additive process are widely used for packaging substrates. Along with increasing demands of downsizing electronic devices with high functionality, packaging substrates installed with semiconductors in such devices are strongly required to be miniaturized with high density of circuit wirings. We report our insulation build-up materials and processes for advanced packages with fine line/space and high reliability. The insulation materials we developed show low coefficient of thermal expansion (CTE), low dielectric loss tangent and good thinner insulation reliability. They can produce fine line and space (FLS) under 10μm pitch by a semi-additive process.

Design and Demonstration of 40 micron Bump Pitch Multi-layer RDL on Panel-based Glass Interposers

2015 ◽  
Vol 2015 (1) ◽  
pp. 000379-000385 ◽  
Author(s):  
Brett Sawyer ◽  
Yuya Suzuki ◽  
Zihan Wu ◽  
Hao Lu ◽  
Venky Sundaram ◽  
...  
Keyword(s):  
High Speed ◽  
Metal Layer ◽  
Low Cost ◽  
Signal Propagation ◽  
Additive Process ◽  
Thin Glass ◽  
Fine Pitch ◽  
Data Rates ◽  
Insertion Losses

This paper describes the design, fabrication, and characterization of a two-metal layer RDL structure at 40 um pitch on thin glass interposers. Such an RDL structure is targeted at 2.5D glass interposer packages to achieve up to 1 TB/s die-to-die bandwidth and off-interposer data rates greater than 400 Gb/s, driven by consumer demand of online services for mobile devices. Advanced packaging architectures including 2.5D and 3D interposers require fine line lithography beyond the capabilities of current organic package substrates. Although silicon interposers fabricated using back-end-of-line processes can achieve these RDL wiring densities, they suffer from high electrical loss and high cost. Organic interposers with high wiring densities have also been demonstrated recently using a single sided thin film process. This paper goes beyond silicon and organic interposers in demonstrating fine pitch RDL on glass interposers fabricated by low cost, double sided, and panel-scalable processes. The high modulus and smooth surface of glass helps to achieve lithographic pitch close to that of silicon. Furthermore, the low loss tangent of glass helps in reducing dielectric losses, thus improving high-speed signal propagation. A semi-additive process flow and projection excimer laser ablation was used to fabricate two-metal layer RDL structures and bare glass RDL layers. A minimum of 3 um lithography and 20 um mico-via pitch was achieved. High-frequency characterization of these RDL structures demonstrated single-ended insertion losses of −0.097 dB/mm at f = 1 GHz and differential insertion losses of −0.05 dB/mm at f = 14 GHz.

Thermomechanical Design for Fine Pitch 3D-IC Packages

2012 ◽  
Vol 2012 (1) ◽  
pp. 001001-001009 ◽  
Author(s):  
Akihiro Horibe ◽  
Sayuri Kohara ◽  
Kuniaki Sueoka ◽  
Keiji Matsumoto ◽  
Yasumitsu Orii ◽  
...  
Keyword(s):  
Coefficient Of Thermal Expansion ◽  
Low Cost ◽  
High Stress ◽  
High Viscosity ◽  
Thermomechanical Properties ◽  
Design Parameters ◽  
Element Analysis ◽  
Package Design ◽  
Fine Pitch ◽  
Silicon Vias

Low stress package design is one of the greatest challenges for the realization of reliable 3D integrated devices, since they are composed of elements susceptible to failures under high stress such as thin dies, metal through silicon vias (TSVs), and fine pitch interconnections. In variety of package components, an organic interposer is a key to obtain low cost modules with high density I/Os. However, the large mismatch in coefficient of thermal expansion (CTE) between silicon dies and organic laminates causes high stress in an organic package. The major parametric components in 3D devices are dies with /without Cu-TSVs, laminates, bumps, and underfill layers. Especially, the die thicknesses and underfill properties are ones of the parameters that give us some range to control as package design parameters. In general, the underfill material with a high modulus and a low CTE is effective in reducing the stress in solder interconnections between the Si die and the laminate. However, the filler content of underfill materials with such mechanical properties generally results in high viscosity. The use of high viscous materials in between silicon dies in 3D modules can degrade process ability in 3D integration. In this study, we show that the interchip underfills in 3D modules have a wider mechanical property window than in 2D modules even with fine pitch interconnections consisting mostly of intermetallic compounds (IMCs). Also the finite element analysis results show that the optimization of the structural or thermomechanical properties of organic laminates and interchip underfill contributes to reduction of stressing thinned silicon dies which may have some risks to the device performance.

scholarly journals Impact on Stability by the Use of Memory in Traub-Type Schemes

Mathematics ◽  
2020 ◽  
Vol 8 (2) ◽  
pp. 274
Author(s):  
Francisco I. Chicharro ◽  
Alicia Cordero ◽  
Neus Garrido ◽  
Juan R. Torregrosa
Keyword(s):  
Order Of Convergence ◽  
Nonlinear Problems ◽  
Higher Order ◽  
Lower Number ◽  
Dynamical Analysis ◽  
The Real ◽  
Original Scheme ◽  
Interpolation Polynomials ◽  
With Memory ◽  
Number Of Iterations

In this work, two Traub-type methods with memory are introduced using accelerating parameters. To obtain schemes with memory, after the inclusion of these parameters in Traub’s method, they have been designed using linear approximations or the Newton’s interpolation polynomials. In both cases, the parameters use information from the current and the previous iterations, so they define a method with memory. Moreover, they achieve higher order of convergence than Traub’s scheme without any additional functional evaluations. The real dynamical analysis verifies that the proposed methods with memory not only converge faster, but they are also more stable than the original scheme. The methods selected by means of this analysis can be applied for solving nonlinear problems with a wider set of initial estimations than their original partners. This fact also involves a lower number of iterations in the process.

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