A Fast Reactivation Scheme in Power Gating Design
2011 ◽
Vol 135-136
◽
pp. 1134-1139
Keyword(s):
Power gating has become a popular technique to reduce the ever-increasing leakage power for commercial microprocessors or SoCs, however the wakeup energy and delay cost harm its performance. This paper proposes a fast reactivation scheme to reduce the transition delay and energy. The experiment results show that, comparing to the traditional power gating implementation, it can achieve 19.66% reactivation energy reduction, 9.28% peak leakage reduction, and 23.36% wakeup delay reduction, at the cost of 2.75% area increasing.
2019 ◽
Vol 43
(3)
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pp. 229-232
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2014 ◽
Vol 2014
◽
pp. 1-10
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Keyword(s):
2020 ◽
Vol 14
(3)
◽
pp. 102-111
2014 ◽
Vol 8
(1)
◽
pp. 8-13
Keyword(s):
Keyword(s):
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