Loop Stiffness of Grinding Machine Developed for 450 mm Silicon Wafers

2016 ◽  
Vol 1136 ◽  
pp. 655-660
Author(s):  
Jumpei Kusuyama ◽  
Shintaro Iwahashi ◽  
Takayuki Kitajima ◽  
Nagahisa Ogasawara ◽  
Akinori Yui ◽  
...  
Keyword(s):  
Silicon Wafer ◽  
Semiconductor Devices ◽  
Grinding Force ◽  
Silicon Wafers ◽  
Spindle System ◽  
High Stiffness ◽  
Axial Feeding ◽  
Spindle Shaft ◽  
Lower Structure ◽  
Grinding Machine

Increasing the wafer diameter from φ300 mm to φ450 mm is required to enhance semiconductor devices productivity. A high-stiffness rotary grinding machine equipped with water hydrostatic bearings was developed for a φ450 mm silicon wafer. The grinding machine has an upper structure consisting of a wheel spindle system and a lower structure consisting of a rotary worktable system. The spindle shaft creates both rotary and axial feeding motion. The upper and lower structures are clamped together rigidly by three kinematic couplings. A higher loop stiffness is required for the grinding machine because grinding the larger wafer requires a higher grinding force. This paper investigates the loop stiffness of the developed wafer grinding machine.

Development of Rotary Work Table with Constant-Flow Hydrostatic Water Bearing for Large Scale Silicon-Wafer Grinding Machine

2014 ◽  
Vol 1017 ◽  
pp. 604-609 ◽  
Author(s):  
Go Okahata ◽  
Akinori Yui ◽  
Takayuki Kitajima ◽  
Shigeki Okuyama ◽  
Hirotsugu Saito ◽  
...  
Keyword(s):  
Numerical Computation ◽  
Silicon Wafer ◽  
Large Scale ◽  
Silicon Wafers ◽  
Surface Grinding ◽  
Constant Flow ◽  
Rotary Table ◽  
Static Stiffness ◽  
Grinding Machine ◽  
Work Table

There is a compelling need for development of a surface grinding machine for 450mm diameter silicon-wafers. The authors have developed a new surface grinding machine for the large scale silicon-wafers. The machine has a rotary work table equipped with a constant-flow hydrostatic water bearing. The table system has to attain high static stiffness to achieve higher loop stiffness. This paper investigates static performances of the rotary table by numerical computation. The obtained results are compared with the experimental ones. Accordingly, it is verified that the developed rotary table has sufficient static performances for the large scale silicon-wafer grinding machine.

scholarly journals The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi
Keyword(s):  
Residual Stress ◽  
Surface Layer ◽  
Phase Transitions ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Silicon Wafer ◽  
Single Crystal Silicon ◽  
Silicon Wafers ◽  
Crystal Silicon ◽  
Diamond Wire

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

Experimental investigation into polishing of monocrystalline silicon wafer using double-disc chemical assisted magnetorheological finishing process

2021 ◽  
pp. 095440622098384
Author(s):  
Mayank Srivastava ◽  
Pulak M Pandey
Keyword(s):  
Surface Roughness ◽  
Silicon Wafer ◽  
Flow Rate ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Slurry Flow ◽  
Magnetorheological Finishing ◽  
Finishing Process ◽  
Process Factors ◽  
Slurry Flow Rate

In the present work, a novel hybrid finishing process that combines the two preferred methods in industries, namely, chemical-mechanical polishing (CMP) and magneto-rheological finishing (MRF), has been used to polish monocrystalline silicon wafers. The experiments were carried out on an indigenously developed double-disc chemical assisted magnetorheological finishing (DDCAMRF) experimental setup. The central composite design (CCD) was used to plan the experiments in order to estimate the effect of various process factors, namely polishing speed, slurry flow rate, percentage CIP concentration, and working gap on the surface roughness ([Formula: see text]) by DDCAMRF process. The analysis of variance was carried out to determine and analyze the contribution of significant factors affecting the surface roughness of polished silicon wafer. The statistical investigation revealed that percentage CIP concentration with a contribution of 30.6% has the maximum influence on the process performance followed by working gap (21.4%), slurry flow rate (14.4%), and polishing speed (1.65%). The surface roughness of polished silicon wafers was measured by the 3 D optical profilometer. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) were carried out to understand the surface morphology of polished silicon wafer. It was found that the surface roughness of silicon wafer improved with the increase in polishing speed and slurry flow rate, whereas it was deteriorated with the increase in percentage CIP concentration and working gap.

In situ wireless measurement of grinding force in silicon wafer self-rotating grinding process

2021 ◽  
Vol 154 ◽  
pp. 107550
Author(s):  
Fei Qin ◽  
Lixiang Zhang ◽  
Pei Chen ◽  
Tong An ◽  
Yanwei Dai ◽  
...  
Keyword(s):  
Silicon Wafer ◽  
Grinding Force ◽  
Grinding Process ◽  
Wireless Measurement

Achieving High Flatness of Workpiece Edge Shape by Considering Polishing Pressure

2010 ◽  
Vol 447-448 ◽  
pp. 71-75
Author(s):  
Takahiro Miyake ◽  
Toshiyuki Enomoto
Keyword(s):  
Semiconductor Devices ◽  
Silicon Wafers ◽  
Polishing Process ◽  
Model Based ◽  
Polishing Pad ◽  
Experimental Analyses ◽  
Polishing Pads ◽  
Polishing Pressure

In recent years, the achievement of further high flatness of workpiece edge shape is strongly required in mirror finishing. Especially, the edge roll off of silicon wafers as the substrates of semiconductor devices is demanded to decrease in the polishing process for raising the yield of IC chips. Many theoretical and experimental analyses for the edge roll off generation have been already done to meet the demand. The analyses, however, cannot fully account for the obtained edge shape in actual polishing. Concretely, the influence of the polishing pressure as one of the key polishing conditions on the edge roll off has not been clarified. In this study, the influence of the polishing pressure on the edge shape was investigated by the polishing experiments and the edge roll off generation analyses using the model based on the viscoelasticity of the polishing pad, which was proposed in the previous study. And it was revealed that an appropriate polishing pressure is needed to be set for achieving high flatness of workpiece edge shape with the consideration of the properties of applied polishing pads.

A Precision Alignment Method to <100> Direction on (110) Silicon Wafer

2001 ◽  
Author(s):  
Fan-Gang Tseng ◽  
Kai-Chen Chang
Keyword(s):  
Silicon Wafer ◽  
Crystal Orientation ◽  
Silicon Wafers ◽  
Innovative Approach ◽  
Alignment Accuracy ◽  
Alignment Method

Abstract This paper proposes a novel pre-etch method to determine the lt;100gt; direction on (110) silicon wafers for bulk etching. Series of circular windows were arranged in an arc of radius 48.9 mm, and bulk-etched to form hexagonal shapes for crystal orientation finding. The corners of the hexagons can be used as an alignment reference for the indication of the lt;100gt; direction on (110) silicon wafers. This innovative approach has been demonstrated experimentally to give an orientation-alignment accuracy of ± 0.03° for (110) wafers with 4-inch diameter.

scholarly journals Eccentricity Parameters Identification for a Motorized Spindle System Based on Improved Maximum Likelihood Method

2020 ◽  
Vol 2020 ◽  
pp. 1-10
Author(s):  
Wengui Mao ◽  
Chaoliang Hu ◽  
Jianhua Li ◽  
Zhonghua Huang ◽  
Guiping Liu
Keyword(s):  
Maximum Likelihood ◽  
Measurement Errors ◽  
Maximum Likelihood Method ◽  
Search Algorithm ◽  
A Priori ◽  
Likelihood Method ◽  
Step Size ◽  
Spindle System ◽  
Grinding Machine ◽  
Search Interval

As a kind of rotor system, the electric spindle system is the core component of the precision grinding machine. The vibration caused by the mass imbalance is the main factor that causes the vibration of the grinding machine. Identifying the eccentricity parameters in an electric spindle system is a key issue in eliminating mass imbalances. It is difficult for engineers to understand the approximate range of eccentricity by experience; that is, it is difficult to obtain a priori information about eccentricity. At the same time, due to the geometric characteristics of the electrospindle system, the material factors and the randomness of the measurement response, these uncertain factors, even in a small case, are likely to cause large deviations in the eccentricity recognition results. The search algorithm used in the maximum likelihood method to identify the eccentricity parameters of the electrospindle system is computationally intensive, and the sensitivity in the iterative process brings some numerical problems. This paper introduces an Advance-Retreat Method (ARM) of the search interval to the maximum likelihood method, the unknown parameter increment obtained by the maximum likelihood method is used as the step size in the iteration, and the Advance-Retreat Method of the search interval is used to adjust the next design point so that the objective function value is gradually decreasing. The recognition results under the three kinds of measurement errors show that the improved maximum likelihood method improves the recognition effect of the maximum likelihood method and can reduce the influence of uncertainty factors on the recognition results, and the robustness is satisfactory.

Fine Grinding of Silicon Wafers: Grinding Marks

2002 ◽  
Author(s):  
Z. J. Pei ◽  
Alan Strasbaugh
Keyword(s):  
Silicon Wafer ◽  
Low Cost ◽  
Base Material ◽  
Silicon Wafers ◽  
High Yield ◽  
Manufacturing Processes ◽  
High Quality ◽  
Fine Grinding ◽  
Etched Silicon

In order to ensure high quality chips with high yield, the base material, semiconductor wafers (over 90% are silicon), must have superior quality. It is critically important to develop new manufacturing processes that allow silicon wafer manufacturers to produce high quality wafers at a reasonably low cost. A newly patented technology—fine grinding of etched silicon wafers—has great potential to manufacture very flat silicon wafers more cost-effectively. This paper presents an investigation of grinding marks in fine grinding. The investigation covers (1) nature of grinding marks, (2) factors that have effects on grinding marks, and (3) approaches to reduce grinding marks. Varying chuck speed during grinding operation is shown to be a very effective approach to reduce grinding marks. Conclusions from this study have direct impacts to the silicon wafer industry.

The Engineering of Silicon Wafer Material Properties Through Vacancy Concentration Profile Control and the Achievement of Ideal Oxygen Precipitation Behavior

1998 ◽  
Vol 510 ◽  
Author(s):  
R. Falster ◽  
D. Gambaro ◽  
M. Olmo ◽  
M. Cornara ◽  
H. Korb
Keyword(s):  
Silicon Wafer ◽  
Integrated Circuit ◽  
Defect Formation ◽  
Electronic Device ◽  
Vacancy Concentration ◽  
Silicon Wafers ◽  
Precipitation Behavior ◽  
Oxygen Precipitation ◽  
Profile Control ◽  
Zone Depth

AbstractA new kind of silicon wafer and a new class of materials engineering techniques for silicon wafers is described. This wafer, called the “Magic Denuded Zone” or MDZ wafer, is produced through the manipulation of the vacancy concentration and, in particular, vacancy concentration depth profiles in the wafer prior to the development of oxygen precipitates in subsequent heat treatments. The result is a wafer with ideal oxygen precipitation behavior for use in all types of integrated circuit applications. The methods used to prepare such wafers combine Frenkel pair generation with injection and the use of surface sinks. Simulations of the vacancy profiles produced by these techniques are presented and discussed. It is shown that within the range of vacancy concentration accessible by these techniques (up to ca. 1013 cm−3) the rate and oxygen concentration dependence of oxygen clustering can be substantially modified. Such techniques can be used to precisely engineer unique and desirable oxygen-related defect performance in silicon wafers both in terms of distribution and rate of defect formation. One result of the application of such techniques is an ideally precipitating silicon wafer in which the resulting oxygen precipitate profile (denuded zone depth and bulk density of precipitates) is independent of the concentration of oxygen of the wafer, the details of the crystal growth process used to prepare the wafer and, to a very large extent, the details of thermal cycles used to process the wafer into an electronic device. Optimal, generic and reliable internal gettering performance is achieved in such a wafer

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