Numerical Investigation of Heat Transfer of Twelve Plastic Leaded Chip Carrier (PLCC) by Using Computational Fluid Dynamic, FLUENTTM Software

2013 ◽  
Vol 795 ◽  
pp. 603-610 ◽  
Author(s):  
Mohamed Mazlan ◽  
A. Rahim ◽  
M.A. Iqbal ◽  
Mohd Mustafa Al Bakri Abdullah ◽  
W. Razak ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Fluid Dynamic ◽  
Three Dimensional ◽  
Circuit Board ◽  
Junction Temperature ◽  
Inlet Velocity ◽  
Chip Carrier ◽  
Flow Through ◽  
Package Density ◽  
Heat And Fluid Flow

Plastic Leaded Chip Carrier (PLCC) package has been emerged a promising option to tackle the thermal management issue of micro-electronic devices. In the present study, three dimensional numerical analysis of heat and fluid flow through PLCC packages oriented in-line and mounted horizontally on a printed circuit board, is carried out using a commercial CFD code, FLUENTTM. The simulation is performed for 12 PLCC under different inlet velocities and chip powers. The contours of average junction temperatures are obtained for each package under different conditions. It is observed that the junction temperature of the packages decreases with increase in inlet velocity and increases with chip power. Moreover, the increase in package density significantly contributed to rise in temperature of chips. Thus the present simulation demonstrates that the chip density (the number of packages mounted on a given area), chip power and the coolant inlet velocity are strongly interconnected; hence their appropriate choice would be crucial.

The Comparison between Four PLCC Packages and Eight PLCC Packages in Personal Computer (PC) Using Computational Fluid Dynamic (CFD), FLUENT SoftwareTM Using Epoxy Moulding Compound Material (EMC)

2013 ◽  
Vol 795 ◽  
pp. 174-181 ◽  
Author(s):  
Mohamed Mazlan ◽  
A. Rahim ◽  
M.A. Iqbal ◽  
Mohd Mustafa Al Bakri Abdullah ◽  
W. Razak ◽  
...  
Keyword(s):  
Reynolds Number ◽  
Printed Circuit Board ◽  
Fluid Dynamic ◽  
Three Dimensional ◽  
Circuit Board ◽  
Junction Temperature ◽  
Moulding Compound ◽  
Fluent Software ◽  
Chip Carrier ◽  
Flow Through

The paper present the three dimensional numerical analysis of heat and fluid flow through Plastic Leaded Chip Carrier (PLCC) packages in inline orientation horizontally mounted on a printed circuit board in a wind tunnel is carried out using a commercial CFD code, FLUENTTM by using Epoxy Moulding Compound (EMC) as a main material. The study was made for four and eight packages with different Reynolds Number and package chip powers. The results are presented in term of junction temperature for four and eight PLCC package under different conditions. It is observed the chip temperatures of eight PLCC packages have higher junction temperature compare to four PLCC packages due to effect of other PLCC because of space and gap between PLCC that have more number of PLCC is smaller. Hence it makes junction temperature of eight PLCC higher compare to four PLCC packages. Moreover, the junction temperature of the packages decreases with increase in Reynolds Number.

Thermal Management of Electronic Components by Using Computational Fluid Dynamic (CFD) Software, FLUENTTM in Several Material Applications (Epoxy, Composite Material & Nanosilver)

2013 ◽  
Vol 795 ◽  
pp. 141-147 ◽  
Author(s):  
M. Mazlan ◽  
A. Rahim ◽  
Mohd Mustafa Al Bakri Abdullah ◽  
W. Razak ◽  
A.F. Zubair ◽  
...  
Keyword(s):  
Thermal Management ◽  
3D Model ◽  
Fluid Dynamic ◽  
Three Dimensional ◽  
Junction Temperature ◽  
Electronic Components ◽  
Different Types ◽  
Fluent Software ◽  
Transfer Problems ◽  
Heat And Fluid Flow

This paper presents the thermal management of electronic components, microprocessor by using three dimensional numerical analysis of heat and fluid flow in computer. 3D model of microprocessors is built using GAMBIT and simulated using FLUENT software. The study was made for four microprocessors arranged in line under different types of materials, inlet velocities and package (chip) powers. The results are presented in terms of average junction temperature and thermal resistance of each package The junction temperature is been observed and it was found that the junction temperature of the microprocessors is not exceed 70o C. It also found that the (chip) powers and inlet velocities are the most important elements to control and manage the junction temperature. The strength of CFD software in handling heat transfer problems is proved to be excellent.

Three Dimensional CFD Simulations of Junction Temperature of Electronic Components Using Nano-Silver

2011 ◽  
Vol 8 (1) ◽  
pp. 29 ◽  
Author(s):  
Mazlan Mohamed Mohamed ◽  
Rahim Atan
Keyword(s):  
Three Dimensional ◽  
Junction Temperature ◽  
Electronic Components ◽  
Cfd Simulations ◽  
Nano Silver ◽  
Different Types ◽  
Fluent Software ◽  
Flow Through ◽  
Transfer Problems ◽  
Heat And Fluid Flow

This paper presents the simulation of three dimensional numerical analyses of heat and fluid flow through chip package. 3D model of chip packages is built using GAMBIT and simulated using FLUENT software. The study was made for four chip packages arranged in line under different types of materials, inlet velocities and package (chip) powers. The results are presented in terms of average junction temperature and thermal resistance of each package The comparison between three types of material in terms of junction temperature has been observed and it was found that the junction temperature of the nano-silver had the lowest junction temperature as compared to epoxy and composite polymer. It also found that the nanosilver had the highest value of thermal conductivity as compared to the others. The strength of CFD software in handling heat transfer problems is proved to be excellent

Root Cause Analysis of a Connector Time-Delayed Fracture

2015 ◽  
Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis
Keyword(s):  
Printed Circuit Board ◽  
Ceramic Substrate ◽  
Circuit Board ◽  
Delayed Fracture ◽  
Ceramic Substrates ◽  
Printed Circuit ◽  
Root Cause ◽  
Chip Carrier ◽  
Electrical Connections ◽  
Grain Boundary Grooves

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.

scholarly journals Compact Modelling of Electrical, Optical and Thermal Properties of Multi-Colour Power LEDs Operating on a Common PCB

Energies ◽  
2021 ◽  
Vol 14 (5) ◽  
pp. 1286
Author(s):  
Krzysztof Górecki ◽  
Przemysław Ptak
Keyword(s):  
Integrated Circuits ◽  
Optical Model ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Junction Temperature ◽  
Optical Parameters ◽  
Spice Simulation ◽  
Light Emitting ◽  
Proposed Model ◽  
Good Agreement

This paper concerns the problem of modelling electrical, thermal and optical properties of multi-colour power light-emitting diodes (LEDs) situated on a common PCB (Printed Circuit Board). A new form of electro-thermo-optical model of such power LEDs is proposed in the form of a subcircuit for SPICE (Simulation Program with Integrated Circuits Emphasis). With the use of this model, the currents and voltages of the considered devices, their junction temperature and selected radiometric parameters can be calculated, taking into account self-heating phenomena in each LED and mutual thermal couplings between each pair of the considered devices. The form of the formulated model is described, and a manner of parameter estimation is also proposed. The correctness and usefulness of the proposed model are verified experimentally for six power LEDs emitting light of different colours and mounted on an experimental PCB prepared by the producer of the investigated devices. Verification was performed for the investigated diodes operating alone and together. Good agreement between the results of measurements and computations was obtained. It was also proved that the main thermal and optical parameters of the investigated LEDs depend on a dominant wavelength of the emitted light.

Three Dimensional Detection of the via in the PCB CT Image Using Morphology Operation

2015 ◽  
Vol 752-753 ◽  
pp. 1406-1412
Author(s):  
Lei Zeng ◽  
Jian Chen ◽  
Han Ning Li ◽  
Bin Yan ◽  
Yi Fu Xu ◽  
...  
Keyword(s):  
Nondestructive Testing ◽  
Printed Circuit Board ◽  
Three Dimensional ◽  
Detection Algorithm ◽  
Circuit Board ◽  
Dimensional Structure ◽  
Three Dimension ◽  
Shape Information ◽  
Printed Circuit ◽  
Testing Technology

In modern industry, the nondestructive testing of printed circuit board (PCB) can prevent effectively the system failure and is becoming more and more important. As a vital part of the PCB, the via connects the devices, the components and the wires and plays a very important role for the connection of the circuits. With the development of testing technology, the nondestructive testing of the via extends from two dimension to three dimension in recent years. This paper proposes a three dimensional detection algorithm using morphology method to test the via. The proposed algorithm takes full advantage of the three dimensional structure and shape information of the via. We have used the proposed method to detect via from PCB images with different size and quality, and found the detection performances to be very encouraging.

Kinetics of Cavity Growth In Solder Joints During Thermal Cycle

1984 ◽  
Vol 40 ◽  
Author(s):  
Donald S. Stone ◽  
Thomas R. Homa ◽  
Che-Yu Li
Keyword(s):  
Printed Circuit Board ◽  
Solder Joints ◽  
Cavity Growth ◽  
Circuit Board ◽  
Printed Circuit Board Assembly ◽  
State Variable ◽  
Circuit Board Assembly ◽  
Variable Equation ◽  
Chip Carrier ◽  
Kinetics Of

AbstractGrain boundary cavity growth in solder joints during thermal fatigue is analyzed. The stress cycle profile is estimated based on a geometrically simplified model of a ceramic chip carrier - printed circuit board assembly and a state variable equation for plastic flow in the solder.

Comparison of Different Methods for Stress and Deflection Analysis in Embedded Die Packages during the Assembly Process

2014 ◽  
Vol 2014 (1) ◽  
pp. 000355-000360
Author(s):  
K. Macurova ◽  
R. Bermejo ◽  
M. Pletz ◽  
R. Schöngrundner ◽  
T. Antretter ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Plastic Material ◽  
Three Dimensional ◽  
Diffraction Method ◽  
Element Model ◽  
Analytical Investigation ◽  
Circuit Board ◽  
Curvature Radius ◽  
Assembly Process ◽  
Deflection Analysis

Important topics for electronic packages are thermally induced stresses created during package manufacturing and their role in mechanical failure. In the present paper, an analytical and a numerical analysis of the assembly process (component attached with an adhesive to a copper foil) is investigated. This process is prior to the lamination of the printed circuit board. Stresses develop due to a mismatch of coefficients of thermal expansion and particularly to shrinkage associated with adhesive polymerization. The analytical investigation is based on the classical laminate theory and an interfacial model. The three-dimensional numerical finite element model is capable to use geometric and material properties which are not possible to investigate analytically. In particular, the influence of the adhesive meniscus and plastic material models for copper and adhesive are investigated. The models are validated experimentally by an X-ray diffraction method (Rocking-Curve-Technique) showing a good agreement of the calculated and measured curvature radius values.

Comparison of Different Methods for Stress and Deflection Analysis in Embedded Die Packages During the Assembly Process

2015 ◽  
Vol 12 (2) ◽  
pp. 80-85 ◽  
Author(s):  
K. Macurova ◽  
R. Bermejo ◽  
M. Pletz ◽  
R. Schöngrundner ◽  
T. Antretter ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Plastic Material ◽  
Three Dimensional ◽  
Diffraction Method ◽  
Element Model ◽  
Analytical Investigation ◽  
Circuit Board ◽  
Curvature Radius ◽  
Assembly Process ◽  
Deflection Analysis

Important topics for electronic packages are thermally induced stresses created during package manufacturing and their role in mechanical failure. In the present paper, an analytical and a numerical analysis of the assembly process (component attached with an adhesive to a copper foil) is investigated. This process is prior to the lamination of the printed circuit board. Stresses develop due to a mismatch of coefficients of thermal expansion and particularly to shrinkage associated with adhesive polymerization. The analytical investigation is based on the classical laminate theory and an interfacial model. The three-dimensional, numerical, finite element model is capable of using geometric and material properties not possible to investigate analytically. In particular, the influence of the adhesive meniscus and plastic material models for copper and adhesive are investigated. The models are validated experimentally by an x-ray diffraction method (rocking-curve technique) showing a good agreement of the calculated and measured curvature radius values.

High quality factor fractal inductor with complementary split-ring array inclusion

Circuit World ◽  
2020 ◽  
Vol 46 (3) ◽  
pp. 215-219
Author(s):  
Akhendra Kumar Padavala ◽  
Narayana Kiran Akondi ◽  
Bheema Rao Nistala
Keyword(s):  
Quality Factor ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Three Dimensional ◽  
Circuit Board ◽  
Integrated Circuit Design ◽  
Split Ring ◽  
Content Type ◽  
Practical Implications

Purpose This paper aims to present an efficient method to improve quality factor of printed fractal inductors based on electromagnetic band-gap (EBG) surface. Design/methodology/approach Hilbert fractal inductor is designed and simulated using high-frequency structural simulator. To improve the quality factor, an EBG surface underneath the inductor is incorporated without any degradation in inductance value. Findings The proposed inductor and Q factor are measured based on well-known three-dimensional simulator, and the results are compared experimentally. Practical implications The proposed method was able to significantly decrease the noise with increase in the speed of radio frequency and sensor-integrated circuit design. Originality/value Fractal inductor is designed and simulated with and without EBG surfaces. The measurement of printed circuit board prototypes demonstrates that the inclusion of split-ring array as EBG surface increases the quality factor by 90 per cent over standard fractal inductor of the same dimensions with a small degradation in inductance value and is capable of operating up to 2.4 GHz frequency range.

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