Security Based Processed Video Distribution on Multi-Core System

2014 ◽  
Vol 984-985 ◽  
pp. 1357-1363
Author(s):  
M. Vinothini ◽  
M. Manikandan
Keyword(s):  
Computation Time ◽  
Communication Process ◽  
Secret Key ◽  
Core System ◽  
Ip Address ◽  
Video Distribution ◽  
Encryption And Decryption ◽  
Security Guarantees ◽  
Secured Communication ◽  
Parallel Fashion

During real time there are problems in transmitting video directly to the client. One of the main problems is, intermediate intelligent proxy can easily hack the data as the transmitter fails to address authentication, and fails to provide security guarantees. Hence we provide steganography and cryptography mechanisms like secure-code, IP address and checksum for authentication and AES algorithm with secret key for security. Although the hacker hacks the video during transmission, he cannot view the information. Based on IP address and secure-code, the authenticated user only can get connected to the transmitter and view the information. For further improvement in security, the video is converted into frames and these frames are split into groups and separate shared key is applied to each group of frames for encryption and decryption. This secured communication process is applied in image processing modules like face detection, edge detection and color object detection. To reduce the computation time multi-core CPU processing is utilized. Using multi-core, the tasks are processed in parallel fashion.

scholarly journals A New Hybrid Cryptography Technique in Wireless Sensor Network

2019 ◽  
Vol 8 (10) ◽  
pp. 121-131
Keyword(s):  
Wireless Sensor Network ◽  
Sensor Network ◽  
Traditional Approach ◽  
Computation Time ◽  
Data Encryption ◽  
Wireless Sensor ◽  
Secret Key ◽  
Cryptographic Algorithm ◽  
Encryption And Decryption ◽  
Symmetric Key

The wireless sensor network is a large number of tiny nodes installed in insecure environment for monitoring, gathering and transferring data and are prone to security threats for its limited resources. In order to transmit the data and to protect from different attacks in the network, security is maintained. To achieve confidentiality, authenticity and authorization of data which secure the data from different attacks cryptographic algorithm were used. The number of keys used in the cryptographic algorithm determines the security of the data. Cryptographic algorithms are broadly classified into two types symmetric cryptography and asymmetric cryptography. In the symmetric key cryptographic algorithm, a secret key is shared in the network and in asymmetric key cryptographic algorithm two keys are used for data security. In wireless sensor network, symmetric key cryptography required more storage to store the key among all the nodes of the network and in asymmetric key cryptography more computation time is require for the data encryption and decryption. To avoid memory and computation overhead we proposed a hybrid cryptosystem to handle the security in the wireless sensor network. Initially shared key is exchanged among nodes using ECC which is a public key algorithm. Data is encrypted and decrypted using RC4 symmetric key algorithm. Various performance measures such as time taken for encryption and decryption process and memory needed for storing cipher text data. The proposed model shows faster encryption of data and takes less memory for key storage as compared to the traditional approach.

APPLICATION OF DISCRETE CHAOTIC DYNAMICAL SYSTEMS IN CRYPTOGRAPHY — DCC METHOD

1999 ◽  
Vol 09 (06) ◽  
pp. 1121-1135 ◽  
Author(s):  
ZBIGNIEW KOTULSKI ◽  
JANUSZ SZCZEPAŃSKI ◽  
KAROL GÓRSKI ◽  
ANDRZEJ PASZKIEWICZ ◽  
ANNA ZUGAJ
Keyword(s):  
Gas Dynamics ◽  
Chaotic Systems ◽  
Initial Position ◽  
Initial Condition ◽  
Practical Realization ◽  
Secret Key ◽  
Initial Angle ◽  
System A ◽  
Encryption And Decryption ◽  
Dynamics Models

In the paper we propose a method of constructing cryptosystems, utilizing a nonpredictability property of discrete chaotic systems. We point out the requirements for such systems to ensure their security. The presented algorithms of encryption and decryption are based on multiple iteration of a certain dynamical chaotic system coming from gas dynamics models. A plaintext message specifies a part of the initial condition of the system (a particle's initial position). A secret key specifies the remaining part of initial condition (the particle's initial angle) as well as a sequence of discrete choices of the pre-images in the encryption procedure. We also discuss problems connected with the practical realization of such chaotic cryptosystems. Finally we demonstrate numerical experiments illustrating the basic properties of the proposed cryptosystem.

Quantum communication scheme with freely selectable users

2021 ◽  
pp. 2150156
Author(s):  
Tianqi Dou ◽  
Hongwei Liu ◽  
Jipeng Wang ◽  
Zhenhua Li ◽  
Wenxiu Qu ◽  
...  
Keyword(s):  
Quantum Key Distribution ◽  
Quantum Communication ◽  
Information Science ◽  
Quantum Secret Sharing ◽  
Key Distribution ◽  
Communication Process ◽  
Secret Key ◽  
Quantum Information Science ◽  
Transmission Distance ◽  
Communication Scheme

Quantum communication plays an important role in quantum information science due to its unconditional security. In practical implementations, the users of each communication vary with the transmitted information, and hence not all users are required to participate in each communication round. Therefore, improving the flexibility and efficiency of the actual communication process is highly demanded. Here, we propose a theoretical quantum communication scheme that realizes secret key distribution for both the two-party quantum key distribution (QKD) and multi-party quantum secret sharing (QSS) modes. The sender, Alice, can freely select one or more users to share keys among all users, and nonactive users will not participate in the process of secret key sharing. Numerical simulations show the superiority of the proposed scheme in transmission distance and secure key rate. Consequently, the proposed scheme is valuable for secure quantum communication network scenarios.

Design Of Hybrid Cryptography With Vigenere Cipher And RSA Algorithm On IOT Data Security

2020 ◽  
Vol 8 (4) ◽  
pp. 475
Author(s):  
Maria Okta Safira ◽  
I Komang Ari Mogi
Keyword(s):  
System Architecture ◽  
Data Security ◽  
Data Encryption ◽  
Public Key ◽  
Secret Message ◽  
Secret Key ◽  
Rsa Algorithm ◽  
Tcp Protocol ◽  
Public Keys ◽  
Encryption And Decryption

In this paper two methods are used, namely the vigenere cipher method and the RSA method. The vigenere cipher method is an example of a symmetric algorithm, while RSA is an example of an asymmetric algorithm. The combination of these two methods is called hybrid cryptography which has the advantage in terms of speed during the encryption process. Each process, which is encryption and decryption, is carried out twice, so that security can be ensured. In the process of forming the key used the RSA method. In the encryption process using public keys that have been generated before when the key is formed. This public key is used in sending data to the recipient of a secret message where this key is used for the data encryption process. The Secret key is kept and will be used during the decryption process. There is a system architecture that describes how clients and servers communicate with each other over the internet using the TCP protocol where the client here is an IoT device and the server is a server. 

scholarly journals A Programming Model Performance Study Using the NAS Parallel Benchmarks

2010 ◽  
Vol 18 (3-4) ◽  
pp. 153-167 ◽  
Author(s):  
Hongzhang Shan ◽  
Filip Blagojević ◽  
Seung-Jai Min ◽  
Paul Hargrove ◽  
Haoqiang Jin ◽  
...  
Keyword(s):  
Performance Monitoring ◽  
Programming Model ◽  
Model Performance ◽  
Computation Time ◽  
Programming Models ◽  
Memory Usage ◽  
Multicore Architectures ◽  
Performance Study ◽  
Network Resources ◽  
Core System

Harnessing the power of multicore platforms is challenging due to the additional levels of parallelism present. In this paper we use the NAS Parallel Benchmarks to study three programming models, MPI, OpenMP and PGAS to understand their performance and memory usage characteristics on current multicore architectures. To understand these characteristics we use the Integrated Performance Monitoring tool and other ways to measure communication versus computation time, as well as the fraction of the run time spent in OpenMP. The benchmarks are run on two different Cray XT5 systems and an Infiniband cluster. Our results show that in general the three programming models exhibit very similar performance characteristics. In a few cases, OpenMP is significantly faster because it explicitly avoids communication. For these particular cases, we were able to re-write the UPC versions and achieve equal performance to OpenMP. Using OpenMP was also the most advantageous in terms of memory usage. Also we compare performance differences between the two Cray systems, which have quad-core and hex-core processors. We show that at scale the performance is almost always slower on the hex-core system because of increased contention for network resources.

The Design and Implementation of a Heterogeneous Multi-Core Security Chip Architecture Based on Shared Memory System

2014 ◽  
Vol 668-669 ◽  
pp. 1314-1318
Author(s):  
Lei Zhang ◽  
Ren Ping Dong ◽  
Chang Zhang ◽  
Ya Ping Yu
Keyword(s):  
Low Power ◽  
Computer Architecture ◽  
Shared Memory ◽  
High Performance ◽  
Stream Cipher ◽  
Ic Card ◽  
Task Partitioning ◽  
Core System ◽  
Design And Implementation ◽  
Encryption And Decryption

With the existence of traditional SOC chip, the encryption and decryption speed and low power cannot meet the computing needs of the modern diversity, then we present a heterogeneous multi-core system which designed based on shared memory on the Xilinx Virtex-5 platform. This paper is in-depth research about heterogeneous multi-core password architecture, static task partitioning, scheduling strategy and the communication mechanism between cores. The three cores systems are designed and builded based on shared memory to realize ZUC algorithm which generates a stream cipher on virtex-5 platform. The three microblaze cores are responsible for inter-core communication, the implementation of ZUC algorithm and articulating IC card to read keys. Through the design of three cores system, give full play to the hardware, software and computer architecture parallelism at all levels to improve the performance of the algorithm to achieve high performance green computing.

scholarly journals IMAGE ENCRYPTION FOR SECURE INTERNET TRANSFER

2021 ◽  
Vol 6 (1) ◽  
Author(s):  
V Goutham Bharadwaja ◽  
Yashas M S ◽  
Yathendra Yadav T V ◽  
Gelvesh G
Keyword(s):  
Image Encryption ◽  
Input Image ◽  
Encryption Algorithm ◽  
Secret Key ◽  
Image Transfer ◽  
Important Data ◽  
Aes Algorithm ◽  
Encryption And Decryption ◽  
Chaos Sequence ◽  
Image Encryption Algorithm

Security is a crucial side to preserve the confidentiality of information such as pictures and text. The probability of an assailant attempting to access the image in the course of transferring process is high as assailant may get hold of important data. Therefore, encryption methods are used for securing the data. A novel image encryption algorithm that is a combination of the AES algorithm and the chaos sequence is proposed in this paper. The project will use AES for encryption and decryption of the image transfer because AES is capable of solving problem that cannot be resolved by different algorithms. The original image is transformed into cipher-image using a share secret key and this process is called encryption while the reverse of encryption process is known as decryption. This method’s sensitivity to the initial values and input image, even the tiniest changes within these values will result in significant changes in the encrypted image. We show that this approach can shield the image against different attacks exploitation using histogram analysis.

scholarly journals 3 Introducing Primality Testing Algorithm with an Implementation on 64 bits RSA Encryption Using Verilog

2018 ◽  
Vol 1 (1) ◽  
pp. 6
Author(s):  
Rehan Shams ◽  
Fozia Hanif Khan ◽  
Umair Jillani ◽  
M. Umair
Keyword(s):  
Communication System ◽  
Prime Numbers ◽  
Key Generation ◽  
Random Generation ◽  
Primality Testing ◽  
Rsa Algorithm ◽  
Encryption And Decryption ◽  
Number Of Cycles ◽  
Testing Algorithm ◽  
Secured Communication

A new structure to develop 64-bit RSA encryption engine on FPGA is being presented in this paper that can be used as a standard device in the secured communication system. The RSA algorithm has three parts i.e. key generation, encryption and decryption. This procedure also requires random generation of prime numbers, therefore, we are proposing an efficient fast Primality testing algorithm to meet the requirement for generating the key in RSA algorithm. We use right-to-left-binary method for the exponent calculation. This reduces the number of cycles enhancing the performance of the system and reducing the area usage of the FPGA. These blocks are coded in Verilog and are synthesized and simulated in Xilinx 13.2 design suit.

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