4H-SiC Trench Structure Schottky Diodes

2012 ◽  
Vol 717-720 ◽  
pp. 933-936 ◽  
Author(s):  
Masatoshi Aketa ◽  
Yuta Yokotsuji ◽  
Mineo Miura ◽  
Takashi Nakamura
Keyword(s):  
Schottky Barrier ◽  
Leakage Current ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
The Novel ◽  
Barrier Heights ◽  
Switching Losses ◽  
Forward Voltage Drop ◽  
Key Issues ◽  
Trench Structure

This paper presents three different structures of Schottky diodes that were fabricated with low Schottky barrier heights. To reduce the forward voltage drop, the introduction of a lower Schttoky barrier is necessary. One of key issues associated with diodes having a low Schottky barrier height and a planar structure is an excessively high leakage current. By introducing the novel trench structure, the leakage current was reduced to a reasonable level. Furthermore it was confirmed that they have minimal switching time during turn-off and high avalanche capability. Thus trench structure Schottky diodes are able to reduce not only switching losses but also conductive losses and demonstrate sufficient robustness.

Influence of Trench Design on the Electrical Properties of 650V 4H-SiC JBS Diodes

2019 ◽  
Vol 963 ◽  
pp. 549-552
Author(s):  
Oleg Rusch ◽  
Jonathan Moult ◽  
Tobias Erlbacher
Keyword(s):  
Electrical Properties ◽  
Leakage Current ◽  
Breakdown Voltage ◽  
Voltage Drop ◽  
Electrical Characteristics ◽  
Electrical Field ◽  
Forward Voltage ◽  
Voltage Drops ◽  
Forward Voltage Drop ◽  
Trench Structure

This work presents a design study of customized p+ arrays having influence on the electrical properties of manufactured 4H-SiC Junction Barrier Schottky (JBS) diodes with designated electrical characteristics of 5 A forward and 650 V blocking capabilities. The effect of the Schottky area consuming p+ grid on the forward voltage drop, the leakage current and therefore the breakdown voltage was investigated. A recessed p+ implantation, realized through trench etching before implanting the bottom of the trenches, results in a more effective shielding of the electrical field at the Schottky interface and therefore reduces the leakage current. Customizing the p+ grid array in combination with the trench structure, various JBS diode variants with active areas of 1.69 mm2 were fabricated whereas forward voltage drops of 1.58 V @ 5 A with blocking capabilities up to 1 kV were achieved.

4.5 kV SiC Junction Barrier Schottky Diodes with Low Leakage Current and High Forward Current Density

2017 ◽  
Vol 897 ◽  
pp. 427-430 ◽  
Author(s):  
Johannes Schoeck ◽  
Jonas Buettner ◽  
Mathias Rommel ◽  
Tobias Erlbacher ◽  
Anton J. Bauer
Keyword(s):  
Leakage Current ◽  
Breakdown Voltage ◽  
Current Density ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Low Leakage ◽  
Forward Current ◽  
Low Leakage Current ◽  
Forward Voltage Drop ◽  
Chip Size

High-voltage 4H-SiC Junction Barrier Schottky diodes with a reverse breakdown voltage of over 4.5 kV and a turn-on voltage below 1 V have been fabricated. They achieved a forward current of 5 A at a forward voltage drop of 1.8 V and 20 A at 4.2 V. A low reverse leakage current of 0.3 μA at 1.2 kV and 37 μA at 3.3 kV was measured. The chip size was 7.3 mm x 7.3 mm, the active area 0.25 cm2 and the diode was able to handle a repetitive pulse current density of over 300 A/cm2 without degradation. Floating field rings in combination with a field-stop ring were used as edge termination to reach 73 % of the theoretical breakdown voltage. The epitaxial layer was 32 μm thick, with a nitrogen doping concentration of 1 x 1015 cm-3. The JBS diodes have been manufactured in a 100 mm SiC prototyping line, using well established processing technology, to achieve cost-efficient devices.

Effect of Thermal Treatment for Pd and PdSi Schottky Contacts on p-GaN

2006 ◽  
Vol 517 ◽  
pp. 242-246
Author(s):  
C.K. Tan ◽  
Azlan Abdul Aziz ◽  
F.K. Yam ◽  
C.W. Lim ◽  
Hassan Zainuriah ◽  
...  
Keyword(s):  
Thermal Treatment ◽  
Schottky Barrier ◽  
Leakage Current ◽  
Schottky Diode ◽  
Schottky Diodes ◽  
Schottky Contacts ◽  
Electrical Characteristics ◽  
Barrier Heights

Pd Schottky diode exhibited stable rectifying behavior up to 500°C for 35 minutes in sequential annealing; with the Schottky barrier heights (SBHs), ΦB (I-V) of 0.6-0.7eV with the leakage current (LC) of 20 A at -5V. With the same range of SBHs, PdSi diodes were stable up to 500°C for 5 minutes with the LC of 0.182mA at -5V. The electrical characteristics obtained in this study are also compared with those obtained for Pd and PdSi Schottky diodes on p-GaN.

High Temperature capable SiC Schottky diodes, based on buried grid design.

2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000058-000060
Author(s):  
Tomas Hjort ◽  
Adolf Schöner ◽  
Andy Zhang ◽  
Mietek Bakowski ◽  
Jang-Kwon Lim ◽  
...  
Keyword(s):  
High Temperature ◽  
Schottky Barrier ◽  
Leakage Current ◽  
Schottky Diode ◽  
Schottky Diodes ◽  
Electrical Characteristics ◽  
Schottky Barrier Diodes ◽  
Grid Design ◽  
High Temperature Operation

Electrical characteristics of 4H-SiC Schottky barrier diodes, based on buried grid design are presented. The diodes, rated to 1200V/10A and assembled into high temperature capable TO254 packages, have been tested and studied up to 250°C. Compared to conventional SiC Schottky diodes, Ascatron's buried grid SiC Schottky diode demonstrates several orders of magnitude reduced leakage current at high temperature operation.

scholarly journals 10 kV Silicon Carbide PiN Diodes—From Design to Packaged Component Characterization

Energies ◽  
2019 ◽  
Vol 12 (23) ◽  
pp. 4566 ◽  
Author(s):  
Asllani ◽  
Morel ◽  
Phung ◽  
Planson
Keyword(s):  
Silicon Carbide ◽  
Leakage Current ◽  
Voltage Drop ◽  
Forward Bias ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Pulse Switching ◽  
Turn On ◽  
Forward Voltage Drop ◽  
Fabrication And Characterization

This paper presents the design, fabrication and characterization results obtained on the last generation (third run) of SiC 10 kV PiN diodes from SuperGrid Institute. In forward bias, the 59 mm2 diodes were tested up to 100 A. These devices withstand voltages up to 12 kV on wafer (before dicing, packaging) and show a low forward voltage drop at 80 A. The influence of the temperature from 25 °C to 125 °C has been assessed and shows that resistivity modulation occurs in the whole temperature range. Leakage current at 3 kV increases with temperature, while being three orders of magnitude lower than those of equivalent Si diodes. Double-pulse switching tests reveal the 10 kV SiC PiN diode’s outstanding performance. Turn-on dV/dt and di/dt are −32 V/ns and 311 A/µs, respectively, whereas turn-off dV/dt and di/dt are 474 V/ns and −4.2 A/ns.

Investigation of Stacking Faults Affecting on Reverse Leakage Current of 4H-SiC Junction Barrier Schottky Diodes Using Device Simulation

2014 ◽  
Vol 778-780 ◽  
pp. 828-831 ◽  
Author(s):  
Junichi Hasegawa ◽  
Kazuya Konishi ◽  
Yu Nakamura ◽  
Kenichi Ohtsuka ◽  
Shuhei Nakata ◽  
...  
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Leakage Current ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Stacking Faults ◽  
Metal Electrode ◽  
Reverse Leakage Current ◽  
Electrode Interface ◽  
The Relationship

We clarified the relationship between the enhanced leakage current of SiC Junction Barrier Schottky diodes and the stacking faults in the SiC crystal at the SiC and metal electrode interface by measuring the electrical and optical properties, and confirm by using the numerical simulations. Numerical simulation considering local lowering of Schottky barrier height, which is 0.8 eV lower than that of 4H-SiC well explained the 2-4 orders of magnitude higher reverse leakage current caused by the SFs. We concluded that the locally lowering of the Schottky barrier height at the 3C-SiC layer in the 4H-SiC surface is a main cause of the large reverse leakage current.

Impact of Interface Traps on Current-Voltage Characteristics of 4H-SiC Schottky-Barrier Diodes

2014 ◽  
Vol 778-780 ◽  
pp. 710-713 ◽  
Author(s):  
Hamid Amini Moghadam ◽  
Sima Dimitrijev ◽  
Ji Sheng Han
Keyword(s):  
Schottky Barrier ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Interface Traps ◽  
Barrier Heights ◽  
Current Voltage ◽  
Donor Type ◽  
Current Voltage Characteristics ◽  
Expected Values

This paper presents a physical model based on interface traps to explain both the larger barrier heights of practical Schottky diodes in comparison to the theoretically expected values and the appearance of a knee in the log I–V characteristics. According to this model, acceptor-type interface traps near the valance band increase the Schottky barrier height, which shifts the log I–V characteristic to higher forward-bias voltages. In addition to the acceptor traps, donor-type interface traps can appear near the conduction band, and when they do, they cause the knee in the log I–V characteristics as their energy level falls below the Fermi level and the charge associated with these traps changes from positive to neutral.

Degradation of Majority Carrier Conductions and Blocking Capabilities in 4H-SiC High Voltage Devices due to Basal Plane Dislocations

2008 ◽  
Vol 1069 ◽  
Author(s):  
Sei-Hyung Ryu ◽  
Qingchun Zhang ◽  
Husna Fatima ◽  
Sarah Haney ◽  
Robert Stahlbush ◽  
...  
Keyword(s):  
High Voltage ◽  
Basal Plane ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Stacking Faults ◽  
Majority Carrier ◽  
Before And After ◽  
Forward Voltage Drop ◽  
Basal Plane Dislocation

ABSTRACTThis paper presents the effect of recombination-induced stacking faults on the drift based forward conduction and leakage currents of high voltage 4H-SiC power devices. To show the effects, 10 kV 4H-SiC MPS (Merged PiN Schottky) diodes have been fabricated on a standard wafer and a low BPD (Basal Plane Dislocation) wafer, and their IV characteristics were evaluated before and after a forward bias stress, which resulted in minority carrier recombination and conductivity modulation in the drift epilayer of the diodes. After the stressing, the diode fabricated on standard wafer showed a significant increase in forward voltage drop, as well as a marked increase in leakage current, which were due to induction of stacking faults. The diode on the low BPD wafer showed very little change after the stress because the induction of stacking faults was minimized. Similar results were also observed on a 10 kV 4H-SiC DMOSFET. The results suggest that recombination-induced stacking faults are detrimental to all device types, and injection of minority carriers in majority carrier devices should be avoided at all times.

Conductivity Modulated and Implantation-Free 4H-SiC Ultra-High-Voltage PiN Diodes

2018 ◽  
Vol 924 ◽  
pp. 568-572 ◽  
Author(s):  
Arash Salemi ◽  
Hossein Elahipanah ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
Leakage Current ◽  
High Voltage ◽  
Voltage Drop ◽  
Device Simulation ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Forward Voltage Drop ◽  
Ultra High Voltage

Implantation-free mesa etched ultra-high-voltage 4H-SiC PiN diodes are fabricated, measured and analyzed by device simulation. The diode’s design allows a high breakdown voltage of about 19.3 kV according to simulations. No reverse breakdown is observed up to 13 kV with a very low leakage current of 0.1 μA. A forward voltage drop (VF) and differential on-resistance (Diff. Ron) of 9.1 V and 41.4 mΩ cm2are measured at 100 A/cm2, respectively, indicating the effect of conductivity modulation.

Fermi Level Pinning in Au Schottky Barriers on InGaP and InGaAlP

1994 ◽  
Vol 340 ◽  
Author(s):  
V.A. Gorbyley ◽  
A.A. Chelniy ◽  
A.A. Chekalin ◽  
A.Y. Polyakov ◽  
S.J. Pearon ◽  
...  
Keyword(s):  
Quantum Well ◽  
Fermi Level ◽  
Plasma Treatment ◽  
Schottky Barrier ◽  
Hydrogen Plasma ◽  
Schottky Diodes ◽  
Schottky Barriers ◽  
Quantum Well Structures ◽  
Fermi Level Pinning ◽  
Barrier Heights

ABSTRACTIt is shown that in Au/InGaP and Au/InGaAlP Schottky diodes the Fermi level is pinned by metal-deposition-induced midgap states. Hydrogen plasma treatment of such diodes greatly improves the reverse currents. The measured Schottky barrier heights seem to correlate with the valence band offsets measured by DLTS on quantum well structures.

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