Effectiveness of Barrier Layer Metallizations in Long Term High Temperature Endurance Tests on Wire Bond Interconnections

2013 ◽  
Vol 10 (4) ◽  
pp. 163-170
Author(s):  
S. T. Riches ◽  
C. Johnston ◽  
A. Lui
Keyword(s):  
High Temperature ◽  
Barrier Layer ◽  
Failure Modes ◽  
Critical Factor ◽  
Silicon On Insulator ◽  
Wire Bond ◽  
Soi Devices ◽  
Operating Temperatures ◽  
Temperature Storage

Silicon on insulator (SOI) device technology has been shown to be capable of functioning satisfactorily at operating temperatures of >200°C, with device lifetimes of 5 y at 225°C being declared. One of the key areas governing the lifetime of the packaged electronic devices is the reliability of the wire bond interconnection between the device and the package or substrate connection. Extended temperature storage testing at 250°C of packaged SOI devices has highlighted end of life failure modes associated with wire bond connections. SOI devices are normally supplied with an aluminum based bond pad metallization, which are not suitable for direct connection of Au wire at operating temperatures of >125°C, due to the formation of Au-Al intermetallics. It is possible to postprocess silicon wafers to deposit barrier and connection materials to create a monometallic Au-Au joint at the surface. For long term endurance at temperatures >200°C, the effectiveness of the barrier layer in preventing diffusion of the aluminum bond pad metallization to interact with the Au is a critical factor. This paper presents results of studies carried out on two postprocess metallization systems Au/TiW and Au/Pd/Ni deposited onto aluminum bond pads, which have been Au wire bonded and exposed to 250°C temperature storage for up to 13,000 h. The results have shown that the barrier layers are not effective in preventing diffusion of the aluminum bond pad metallization to create Au-Al based intermetallics. The results are compared with Al-1%Si wire bonding to the aluminum bond pad, where the second wedge bond is attached to a Au/Ni plated metallization, where the degradation appears to be less severe. Recommendations for designing stable wire bond interconnection systems for extended high temperature operation will be presented.

Effectiveness of Barrier Layer Metallisations in Long Term High Temperature Endurance Tests on Wire Bond Interconnections

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000229-000236
Author(s):  
S T Riches ◽  
C Johnston ◽  
A Lui
Keyword(s):  
High Temperature ◽  
Barrier Layer ◽  
Failure Modes ◽  
Silicon On Insulator ◽  
Post Process ◽  
Wire Bond ◽  
Soi Devices ◽  
Operating Temperatures ◽  
Temperature Storage

Silicon on Insulator (SOI) device technology has been shown to be capable of functioning satisfactorily at operating temperatures of >200°C, with device lifetimes of 5 years at 225°C being declared. One of the key areas governing the lifetime of the packaged electronic devices is the reliability of the wire bond interconnection between the device and the package or substrate connection. Extended temperature storage testing at 250°C of packaged SOI devices has highlighted end of life failure modes associated with wire bond connections. SOI devices are normally supplied with an aluminium based bond pad metallisation, which are not suitable for direct connection of Au wire at operating temperatures of >125°C, due to the formation of Au-Al intermetallics. It is possible to post-process silicon wafers to deposit barrier and connection materials to create a mono-metallic Au-Au joint at the surface. For long term endurance at temperatures >200°C, the effectiveness of the barrier layer in preventing diffusion of the aluminium bond pad metallisation to interact with the Au is a critical factor. This paper presents results of studies carried out on two post-process metallisation systems Au/TiW and Au/Pd/Ni deposited onto aluminium bond pads, which have been Au wire bonded and exposed to 250°C temperature storage for up to 13,000 hours. The results have shown that the barrier layers are not effective in preventing diffusion of the aluminium bond pad metallisation to create Au-Al based intermetallics. The results are compared with Al-1%Si wire bonding to the aluminium bond pad, where the 2nd wedge bond is attached to a Au/Ni plated metallisation, where the degradation appears to be less severe. Recommendations for designing stable wire bond interconnection systems for extended high temperature operation will be presented.

Realisation of High Temperature Electronics Packaging Technology for Sensor Conditioning and Processing Applications

2012 ◽  
Vol 2012 (1) ◽  
pp. 000192-000199
Author(s):  
S T Riches ◽  
C Johnston ◽  
A Lui
Keyword(s):  
High Temperature ◽  
High Pressures ◽  
Silicon On Insulator ◽  
Electrical Performance ◽  
Operating Life ◽  
Reliability Data ◽  
High Temperature Electronics ◽  
Aero Engine ◽  
Operating Temperatures

The requirement to install electronic power and control systems in high temperature environments in aero-engines and in down-well exploration has posed a challenge to the traditional limit of 125°C of electronics systems. The leap in operating temperature to above 200°C in combination with high pressures, vibrations and potentially corrosive environments means that different semiconductors, passives, circuit boards and assembly processes will be needed to fulfil target performance specifications. Silicon on Insulator (SOI) device technology has been shown to be capable of functioning satisfactorily at operating temperatures of >200°C. Most of the applications to date have required performance for short times (<2,000 hours) at the highest operating temperatures of up to 225°C in down-well drilling applications. There is interest in extending the endurance of high temperature electronics into aero-engine and other applications where a minimum 20 year operating life is stipulated. Most of the reliability data on the high temperature endurance of the integrated circuit is generated with little consideration of the packaging technologies, whilst most of the reliability data pertinent to high temperature packaging technologies uses test pieces, which limits any conclusions relating to long term electrical performance. This paper will present results of studies on high temperature packaging technologies relevant to signal conditioning and processing functions for sensors in down-well and aero-engine applications. Different die attach and wire bond options have been included in the study and the performance of several functional blocks on a high temperature SOI device has been tracked over the endurance tests which have lasted for >11,000 hours at 250°C. Degradation phenomena such as thermal migration and material deterioration due to high temperature exposure in air and inert atmospheres will be described. An assessment of the availability of high temperature materials and components to meet long term requirements for operation at 250°C will be presented.

End of Life Failure Modes for Packaged SOI Devices for Signal Conditioning and Processing Applications

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000327-000334
Author(s):  
S T Riches ◽  
C Johnston ◽  
A Crossley ◽  
P Grant
Keyword(s):  
High Temperature ◽  
End Of Life ◽  
Failure Modes ◽  
Reliability Data ◽  
High Temperature Electronics ◽  
Die Attach ◽  
Aero Engine ◽  
Endurance Tests ◽  
Soi Devices

Silicon on Insulator (SOI) device technology has been shown to be capable of functioning satisfactorily at operating temperatures of >200°C. Most of the applications to date have required performance for short times (<2,000 hours) at the highest operating temperatures of up to 225°C in down-well drilling applications. There is interest in extending the endurance of high temperature electronics into aero-engine and other applications where a minimum 20 year operating life is stipulated. In order to gain confidence in high temperature electronics that can meet this requirement, accurate reliability data are needed and end of life failure modes need to be identified. Most of the reliability data on the high temperature endurance of the integrated circuit is generated with little consideration of the packaging technologies, whilst most of the reliability data pertinent to high temperature packaging technologies uses test pieces rather than devices, which limits any conclusions relating to long term electrical performance. This paper presents results of temperature storage and cycling endurance studies on SOI devices combined with high temperature packaging technologies relevant to signal conditioning and processing functions for sensors in down-well and aero-engine applications. The endurance studies have been carried out for up to 11,088 hours at 250°C, with functioning devices being tested periodically at room temperature, 125°C and 250°C and rapid thermal cycling from −40°C to +225°C. Different die attach and wire bond options have been included in the study and the performance of several functional blocks on the SOI device has been tracked over the endurance tests. The failure modes observed on completion of the endurance tests include die cracking and deterioration of the device bond pads accelerated due to degradation of some die attach materials. The routes to achieving stable long term performance of packaged devices at temperatures of 250°C will be outlined.

High temperature storage reliability investigation of the Al–Cu wire bond interface

2012 ◽  
Vol 52 (9-10) ◽  
pp. 1966-1970 ◽  
Author(s):  
R. Pelzer ◽  
M. Nelhiebel ◽  
R. Zink ◽  
S. Wöhlert ◽  
A. Lassnig ◽  
...  
Keyword(s):  
High Temperature ◽  
Wire Bond ◽  
High Temperature Storage ◽  
Bond Interface ◽  
Temperature Storage

scholarly journals FCCSP IMC growth under reliability stress follows automotive criteria

2019 ◽  
Vol 3 (1) ◽  
pp. 70-83
Author(s):  
Wei Wei Liu ◽  
Berdy Weng ◽  
Scott Chen
Keyword(s):  
High Temperature ◽  
Flip Chip ◽  
Stress Test ◽  
Temperature Cycling ◽  
Content Type ◽  
Initial Stage ◽  
High Temperature Storage ◽  
Temperature Cycling Test ◽  
Temperature Storage

Purpose The Kirkendall void had been a well-known issue for long-term reliability of semiconductor interconnects; while even the KVs exist at the interfaces of Cu and Sn, it may still be able to pass the condition of unbias long-term reliability testing, especially for 2,000 cycles of temperature cycling test and 2,000 h of high temperature storage. A large number of KVs were observed after 200 cycles of temperature cycling test at the intermetallic Cu3Sn layer which locate between the intermetallic Cu6Sn5 and Cu layers. These kinds of voids will grow proportional with the aging time at the initial stage. This paper aims to compare various IMC thickness as a function of stress test, the Cu3Sn and Cu6Sn5 do affected seriously by heat, but Ni3Sn4 is not affected by heat or moisture. Design/methodology/approach The package is the design in the flip chip-chip scale package with bumping process and assembly. The package was put in reliability stress test that followed AEC-Q100 automotive criteria and recorded the IMC growing morphology. Findings The Cu6Sn5 intermetallic compound is the most sensitive to continuous heat which grows from 3 to 10 µm at high temperature storage 2,000 h testing, and the second is Cu3Sn IMC. Cu6Sn5 IMC will convert to Cu3Sn IMC at initial stage, and then Kirkendall void will be found at the interface of Cu and Cu3Sn IMC, which has quality concerning issue if the void’s density grows up. The first phase to form and grow into observable thickness for Ni and lead-free interface is Ni3Sn4 IMC, and the thickness has little relationship to the environmental stress, as no IMC thickness variation between TCT, uHAST and HTSL stress test. The more the Sn exists, the thicker Ni3Sn4 IMC will be derived from this experimental finding compare the Cu/Ni/SnAg cell and Ni/SnAg cell. Research limitations/implications The research found that FCCSP can pass automotive criteria that follow AEC-Q100, which give the confidence for upgrading the package type with higher efficiency and complexities of the pin design. Practical implications This result will impact to the future automotive package, how to choose the best package methodology and what is the way to do the package. The authors can understand the tolerance for the kind of flip chip package, and the bump structure is then applied for high-end technology. Originality/value The overall three kinds of bump structures, Cu/Ni/SnAg, Cu/SnAg and Ni/SnAg, were taken into consideration, and the IMC growing morphology had been recorded. Also, the IMC had changed during the environmental stress, and KV formation was reserved.

A Minor Change in Sample Preparation Leads to Unexpected Qualification Fails During High Temperature Storage Stress Test

2020 ◽  
Author(s):  
Klaus Peter Tschernay ◽  
Thomas Haber
Keyword(s):  
High Temperature ◽  
Sample Preparation ◽  
Supply Chains ◽  
Division Of Labor ◽  
Failure Modes ◽  
Stress Test ◽  
High Temperature Storage ◽  
A Minor ◽  
Temperature Storage

Abstract In today’s supply chains based on complex division of labor qualification plans must be executed at various levels of semifinished products. This study shows how a supporting process, assumed to be uncritical in terms of the qualification scope for a bare silicon die, is responsible for qualification fails. Although such failures are not relevant for the quality of the final product careful and thorough analysis is required to invalidate such failure modes.

High Temperature Endurance of Packaged SOI Devices for Signal Conditioning and Processing Applications

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000251-000254
Author(s):  
S T Riches ◽  
C Johnston ◽  
M Sousa ◽  
P Grant
Keyword(s):  
High Temperature ◽  
Electronic Materials ◽  
Silicon On Insulator ◽  
Electrical Performance ◽  
Research Centre ◽  
Signal Conditioning ◽  
Reliability Data ◽  
Die Attach ◽  
Soi Devices ◽  
Formed Part

Silicon on Insulator (SOI) device technology is fulfilling a niche requirement for electronics that functions satisfactorily at operating temperatures of >200°C. Most of the reliability data on the high temperature endurance of the devices is generated on the device itself with little attention being paid to the packaging technology around the device. Similarly, most of the reliability data generated on high temperature packaging technologies uses testpieces rather than real devices, which restricts any conclusions on long term electrical performance. This paper presents results of high temperature endurance studies on SOI devices combined with high temperature packaging technologies relevant to signal conditioning and processing functions for sensors in down-well and aero-engine applications. The endurance studies have been carried out for up to 7,056 hours at 250°C, with functioning devices being tested periodically at room temperature, 125°C and 250°C. Different die attach and wire bond options have been included in the study and the performance of multiplexers, transistors, bandgap voltage, oscillators and voltage regulators functional blocks have been characterised. This work formed part of the UPTEMP project which was set-up with support from UK Technology Strategy Board and the EPSRC. The project brought together a consortium of end-users (Sondex Wireline and Vibro-Meter UK), electronic module manufacturers (GE Aviation Systems Newmarket) and material suppliers (Gwent Electronic Materials and Thermastrate Ltd) with Oxford University-Materials Department, the leading UK high temperature electronics research centre.

Analytical Approach to Selecting and Designing a Miniature Downhole Refrigerator

1992 ◽  
Vol 114 (4) ◽  
pp. 339-344 ◽  
Author(s):  
G. A. Bennett
Keyword(s):  
High Temperature ◽  
Failure Modes ◽  
Thermal Protection ◽  
Selection Process ◽  
Systematic Analysis ◽  
Design Changes ◽  
Protection Technology ◽  
High Temperature Components ◽  
Final Selection

The design approach and results from a series of analyses used to select a miniature high-temperature multi-watt refrigerator for thermally protecting downhole instruments are described. Thirty-one systems from nine physical or chemical processes were investigated and compared against the design criteria and constraints. Preliminary thermodynamic analyses and the results of a search for high-temperature components and refrigerants eliminated all but three processes and seven systems. These seven systems were re-evaluated based on a set of proposed design changes that reflect natural evolution from a prototype to commercial system application. Final selection considered refrigerator interactions with the geothermal logging system to define failure modes, ensure compatibility, and allow adaptability to changing conditions. The selected refrigerator design permits reliable, long-term active cooling of downhole instruments in hot wells. The consistent design, systematic analysis and unbiased selection process represent a new body of research results that provide potential for substantial advances in downhole thermal protection technology.

Flip-Chip Ball Grid Array Lead-Free Solder Joint Under Reliability Test

2005 ◽  
Vol 127 (4) ◽  
pp. 446-451 ◽  
Author(s):  
Ming-Hwa R. Jen ◽  
Lee-Cheng Liu ◽  
Jenq-Dah Wu
Keyword(s):  
Mechanical Properties ◽  
High Temperature ◽  
Service Time ◽  
Flip Chip ◽  
Failure Modes ◽  
Mechanical Responses ◽  
Operational Life ◽  
Different Temperatures ◽  
Free Solder

The work is aimed to investigate the mechanical responses of bare dies of the combination of pure tin∕Al–NiV–Cu Under bump metallization (UBM) and packages of pure tin∕Al–NiV–Cu UBM/substrate of standard thickness of aurum. The mechanical properties under multiple reflow and long term high temperature storage test (HTST) tests at different temperatures and the operational life were obtained. A scanning electron microscope was used to observe the growth of IMC and the failure modes in order to realize their reaction and connection. From the empirical results of bare dies, the delamination between IMC and die was observed due to the tests at 260 °C multiple reflow. However, their mechanical properties were not affected. Nevertheless, the bump shear strength of bare dies were decreased by HTST tests. In package, all the results of mechanical properties by multiple reflow test and HTST test were significantly lowered. It was shown that the adhesion between bump and die reduced obviously as tests going on. As for high temperature operational life test in the conditions of 150 °C and 320 mA (5040A∕cm2), the average stable service time of the package was 892 h, and the average ultimate service time of the package was 1053 h.

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