scholarly journals A Novel Purely Active Electronically Controllable Configuration for Simulating Resistance in Floating Form

2017 ◽  
Vol 20 (2) ◽  
pp. 90 ◽  
Author(s):  
Mayank Srivastava ◽  
Dinesh Prasad
Keyword(s):  
Cmos Process ◽  
Passive Component ◽  
Ideal Behavior ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Component Matching ◽  
Low Sensitivity ◽  
Frequency Behavior ◽  
Electronically Tunable

This paper proposes a new purely active floating resistance simulation circuit employing two voltage differencing trans-conductance amplifiers (VDTAs). The proposed configuration enjoys following advantageous features; (i) purely active realization (ii) electronically tunable resistance (iii) no requirement of any active/passive component matching constraint (iv) good non-ideal behavior and (v) low sensitivity values. The Influence of VDTA terminal parasitics on high frequency behavior of proposed circuit is also investigated. The workability of proposed resistor simulator has been verified by an application example of voltage mode low-pass filter. To validate the theoretical analysis, SPICE simulations with TSMC 0.18μm CMOS process parameters have been performed. 

scholarly journals Tunable Lossy and Lossless Grounded Inductors Using Minimum Active and Passive Components

2021 ◽  
Vol 11 (3) ◽  
pp. 171-190
Author(s):  
Tapas Kumar Paul ◽  
Suvajit Roy ◽  
Radha Raman Pal
Keyword(s):  
Power Dissipation ◽  
Maximum Output ◽  
Passive Components ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Transconductance Amplifier ◽  
Low Pass ◽  
Component Matching ◽  
Band Pass ◽  
Electronically Tunable

In this contribution, nine new Grounded Inductance Simulators (GISs) using a single Multiple-Output Current Controlled Current Conveyor Transconductance Amplifier (MO-CCCCTA) and one grounded capacitor are proposed. Among them, two are lossless types and seven are lossy types. The use of a single grounded capacitor makes the circuits suitable for fabrication. All the proposed circuits are electronically tunable through the bias currents of MO-CCCCTA. Furthermore, no component matching conditions are needed for realizing them. The designed circuits are verified through PSPICE simulator with ± 0.9 V power supply. The simulation results show that for all the proposed circuits: maximum operating frequencies are about 12 MHz, power dissipation is less than 0.784 mW, Total Harmonic Distortions (THDs) are under 8.09%, and maximum output voltage noise at 1 MHz frequency is 14.094 nV/√Hz. To exhibit the workability of the proposed circuits, they are used to design band-pass, low-pass filter, parallel RLC resonator, and parasitic inductance cancelator.

Electronically Tunable Current-Mode Third-Order Square-Root-Domain Filter Design

2018 ◽  
Vol 27 (09) ◽  
pp. 1850136
Author(s):  
Ali Kircay ◽  
M. Serhat Keserlioglu ◽  
F. Zuhal Adalar
Keyword(s):  
Filter Design ◽  
Current Mode ◽  
Cmos Process ◽  
Square Root ◽  
Third Order ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Level 3 ◽  
Electronically Tunable

In this study, electronically-tunable, current-mode, square-root-domain, third-order low-pass filter is proposed. The study is carried out with three circuit designs. First circuit is third-order low-pass Butterworth filter, second circuit is third-order low-pass Chebyshev filter and the last circuit is third-order low-pass elliptic filter. All the input and output values of the filter circuit are current. Only grounded capacitors and MOSFETs are required in order to realize the filter circuit. Additionally, natural frequency [Formula: see text] of the current-mode filter can be adjusted electronically using outer current sources. To validate the theory and to demonstrate the performance of third-order filter, frequency and time domain simulations of PSPICE program are used. To that end, TSMC 0.35[Formula: see text][Formula: see text]m Level 3 CMOS process parameters are utilized to realize the simulations of the filter.

scholarly journals Wideband Reconfigurable Integrated Low-Pass Filter for 5G Compatible Software Defined Radio Solutions

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 734
Author(s):  
Karolis Kiela ◽  
Marijan Jurgo ◽  
Vytautas Macaitis ◽  
Romualdas Navickas
Keyword(s):  
Software Defined Radio ◽  
Dynamic Range ◽  
Noise Figure ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Filter Performance ◽  
Low Pass ◽  
Bandwidth Tuning

This article presents a wideband reconfigurable integrated low-pass filter (LPF) for 5G NR compatible software-defined radio (SDR) solutions. The filter uses Active-RC topology to achieve high linearity performance. Its bandwidth can be tuned from 2.5 MHz to 200 MHz, which corresponds to a tuning ratio of 92.8. The order of the filter can be changed between the 2nd, 4th, or 6th order; it has built-in process, voltage, and temperature (PVT) compensation with a tuning range of ±42%; and power management features for optimization of the filter performance across its entire range of bandwidth tuning. Across its entire order, bandwidth, and power configuration range, the filter achieves in-band input-referred third-order intercept point (IIP3) between 32.7 dBm and 45.8 dBm, spurious free dynamic range (SFDR) between 63.6 dB and 79.5 dB, 1 dB compression point (P1dB) between 9.9 dBm and 14.1 dBm, total harmonic distortion (THD) between −85.6 dB and −64.5 dB, noise figure (NF) between 25.9 dB and 31.8 dB and power dissipation between 1.19 mW and 73.4 mW. The LPF was designed and verified using 65 nm CMOS process; it occupies a 0.429 mm2 area of silicon and uses a 1.2 V supply.

Design and Simulation of Switched Capacitor Filter for Speed Change Parameter Converter

2013 ◽  
Vol 562-565 ◽  
pp. 1132-1136
Author(s):  
Xiao Wei Liu ◽  
Jian Yang ◽  
Song Chen ◽  
Liang Liu ◽  
Rui Zhang ◽  
...  
Keyword(s):  
Stop Band ◽  
Cutoff Frequency ◽  
Rapid Change ◽  
Pass Band ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
The Time Domain

In this paper, we design a high-order switched capacitor filter for rapid change parameter converter. This design uses a structure which consists of three biquads filter sub-units. The design is a 6th-order SC elliptic low-pass filter, and the sample frequency is 250 kHz. By the MATLAB Simulink simulation, the system can meet the design requirements in the time domain. In this paper, the 6th-order switched capacitor elliptic low-pass filter was implemented under 0.5 um CMOS process and simulated in Cadence. The final simulation results show that the pass-band cutoff frequency is 10 kHz, and the maximum pass-band ripple is about 0.106 dB. The stop-band cutoff frequency is 20 kHz, and the minimum stop-band attenuation is 74.78 dB.

A New Small-Sized Non-Dispersive Infrared (NDIR) Sensor and its Drive/Readout Circuits

2016 ◽  
Author(s):  
Paul C.-P. Chao ◽  
Li-Chi Hsu ◽  
Trong-Hieu Tran
Keyword(s):  
Pulse Width Modulation ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Analog To Digital ◽  
Readout Circuits ◽  
Low Pass ◽  
Driver Circuit ◽  
Module Size ◽  
Gas Chamber

A new miniaturized, non-dispersive, infrared (NDIR) sensor for CO2 intended to be installed in mobile phones and its drive/readout circuits are presented in this study. A typical NDIR sensor consists of three main components; an infrared (IR) light-emitter (light source), a gas chamber, a photo detector (PD) light receiver) and the associated drive/readout circuits. The geometry of the gas chamber is optimized to minimize the total module size to approximately 10 mm × 5 mm × 5 mm, which is much smaller than commercially-available gas sensors. Driver and readout circuits are successfully designed and taped out. The driver circuit intends to generate pulse width modulation (PWM) signal to control proper dimming of LED. The readout circuit, which acquires small signal from photo detector then converts to digital values, includes amplifier, low pass filter and analog-to-digital converter (ADC). The proposed circuit is fabricated by the TSMC 0.35-μm CMOS process, where the area is 4.527 mm2 while power consumption is 60.16 mW for the whole chip. The resolution is less than 12 ppm along with time constant is 0.1 sec.

The Design of Gm-C Low-Pass Filter for Micromachined Gyroscope

2014 ◽  
Vol 609-610 ◽  
pp. 1072-1076
Author(s):  
Qiu Ye Lv ◽  
Chong He ◽  
Wen Jie Fan ◽  
Yu Feng Zhang ◽  
Xiao Wei Liu
Keyword(s):  
Process Model ◽  
Stop Band ◽  
Cutoff Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Simulation Results ◽  
Micromachined Gyroscope

In this Paper, a 4th-Order Low-Pass Gm-C Filter is Presented. for the Design of Operational Tranconductance Amplifier(OTA), it Adopts the Techniques of Current Division and Current Cancellation. these Techniques can Help to Achieve a Low Transconductance Value. for the Architecture of the 4th-Order Gm-C Filter, it Consists of Two Biquads. the Two Biquads are Cascade Connected. the Gm-C Low-Pass Filter has been Implemented under 0.5 μm CMOS Process Model. the Final Simulation Results Show the Cutoff Frequency of the Filter is 100Hz and the Stop-Band Attenuation is Larger than 60dB. the Power Consumption is Lower than 1mW and the Total Harmonic Distortion(THD) is -55dB.

scholarly journals A CMOS Programmable Fourth-Order Butterworth Active-RC Low-Pass Filter

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 204 ◽  
Author(s):  
Changchun Zhang ◽  
Long Shang ◽  
Yongkai Wang ◽  
Lu Tang
Keyword(s):  
Radio Frequency Identification ◽  
Supply Voltage ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Silicon Area ◽  
Fully Differential ◽  
Low Pass ◽  
Low Sensitivity

This paper presents a low-pass filter (LPF) for an ultra-high frequency (UHF) radio frequency identification (RFID) reader transmitter in standard SMIC 0.18 μm CMOS technology. The active-RC topology and Butterworth approximation function are employed mainly for high linearity and high flatness respectively. Two cascaded fully-differential Tow-Thomas biquads are chosen for low sensitivity to process errors and strong resistance to the imperfection of the involved two-stage fully-differential operational amplifiers. Besides, the LPF is programmable in order to adapt to the multiple data rate standards. Measurement results show that the LPF has the programmable bandwidths of 605/870/1020/1330/1530/2150 kHz, the optimum input 1dB compression point of −7.81 dBm, and the attenuation of 50 dB at 10 times cutoff frequency, with the overall power consumption of 12.6 mW from a single supply voltage of 1.8 V. The silicon area of the LPF core is 0.17 mm2.

A Voltage-Mode Universal Biquadratic Filter Using DDCCTA

2016 ◽  
Vol 25 (05) ◽  
pp. 1650034 ◽  
Author(s):  
Punnavich Phatsornsiri ◽  
Montree Kumngern ◽  
Panit Lamun
Keyword(s):  
Angular Frequency ◽  
Current Conveyor ◽  
Cmos Process ◽  
Passive Component ◽  
Voltage Mode ◽  
Transconductance Amplifier ◽  
Theoretical Predictions ◽  
Low Pass ◽  
Biquadratic Filter ◽  
Component Matching

This paper presents a new voltage-mode (VM) universal biquadratic filter using differential difference current conveyor transconductance amplifier (DDCCTA) as an active element. The circuit employs one DDCCTA, two floating resistors and two floating capacitors which can realize five biquadratic filters, namely low-pass (LP), band-pass (BP), band-stop (BS), high-pass (HP) and all-pass (AP) into one single topology. For realizing these filtering functions, passive component-matching conditions, inverting-type and/or doubling-input signal requirements and changing circuit configuration are absent. The natural angular frequency and quality factor of the filter can be orthogonally controlled deliberately. The VM biquadratic filter using grounded passive components with high-input and low-output impedances can be obtained by adding an additional DDCCTA or differential difference current conveyor (DDCC). The simulation results with 0.5[Formula: see text][Formula: see text]m CMOS process from MIETEC are given to confirm the theoretical predictions and the experimental results are also included to verify the workability of the proposed structure.

LOW-POWER, LOW-VOLTAGE, DUAL-OUTPUT, SECOND GENERATION CURRENT CONVEYOR AND ITS APPLICATION IN LOW-PASS FILTER DESIGN

2013 ◽  
Vol 22 (06) ◽  
pp. 1350044 ◽  
Author(s):  
MOHAMMAD HOSSEIN MAGHAMI ◽  
AMIR M. SODAGAR
Keyword(s):  
Second Generation ◽  
Current Conveyor ◽  
The Body ◽  
Total Power ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Silicon Area ◽  
Total Power Consumption ◽  
Low Pass

A new simple dual-output second generation current conveyor (DO-CCII) circuit is proposed. Designed in a standard 0.5-μm CMOS process, the circuit operates at ±1.5 V supply voltages with a total power consumption of 106 nW. Main characteristics of the proposed DO-CCII are its simplicity, small silicon area consumption, and not suffering from the body effect of MOS transistors. The proposed circuit is employed to implement a first-order low-pass filter with upper -3 dB cut-off frequency of as low as 3.2 Hz.

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