LOW-POWER, LOW-VOLTAGE, DUAL-OUTPUT, SECOND GENERATION CURRENT CONVEYOR AND ITS APPLICATION IN LOW-PASS FILTER DESIGN

2013 ◽  
Vol 22 (06) ◽  
pp. 1350044 ◽  
Author(s):  
MOHAMMAD HOSSEIN MAGHAMI ◽  
AMIR M. SODAGAR
Keyword(s):  
Second Generation ◽  
Current Conveyor ◽  
The Body ◽  
Total Power ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Silicon Area ◽  
Total Power Consumption ◽  
Low Pass

A new simple dual-output second generation current conveyor (DO-CCII) circuit is proposed. Designed in a standard 0.5-μm CMOS process, the circuit operates at ±1.5 V supply voltages with a total power consumption of 106 nW. Main characteristics of the proposed DO-CCII are its simplicity, small silicon area consumption, and not suffering from the body effect of MOS transistors. The proposed circuit is employed to implement a first-order low-pass filter with upper -3 dB cut-off frequency of as low as 3.2 Hz.

scholarly journals Low-Noise Multimodal Reconfigurable Sensor Readout Circuit for Voltage/Current/Resistive/Capacitive Microsensors

2020 ◽  
Vol 10 (1) ◽  
pp. 348 ◽  
Author(s):  
Donggeun You ◽  
Hyungseup Kim ◽  
Jaesung Kim ◽  
Kwonsang Han ◽  
Hyunwoo Heo ◽  
...  
Keyword(s):  
Low Noise ◽  
Oxide Semiconductor ◽  
Total Power ◽  
Cmos Process ◽  
Frequency Noise ◽  
Readout Circuit ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Chopper Stabilization ◽  
Total Power Consumption

This paper presents a low-noise reconfigurable sensor readout circuit with a multimodal sensing chain for voltage/current/resistive/capacitive microsensors such that it can interface with a voltage, current, resistive, or capacitive microsensor, and can be reconfigured for a specific sensor application. The multimodal sensor readout circuit consists of a reconfigurable amplifier, programmable gain amplifier (PGA), low-pass filter (LPF), and analog-to-digital converter (ADC). A chopper stabilization technique was implemented in a multi-path operational amplifier to mitigate 1/f noise and offsets. The 1/f noise and offsets were up-converted by a chopper circuit and caused an output ripple. An AC-coupled ripple rejection loop (RRL) was implemented to reduce the output ripple caused by the chopper. When the amplifier was operated in the discrete-time mode, for example, the capacitive-sensing mode, a correlated double sampling (CDS) scheme reduced the low-frequency noise. The readout circuit was designed to use the 0.18-µm complementary metal-oxide-semiconductor (CMOS) process with an active area of 9.61 mm2. The total power consumption was 2.552 mW with a 1.8-V supply voltage. The measured input referred noise in the voltage-sensing mode was 5.25 µVrms from 1 Hz to 200 Hz.

scholarly journals Wideband Reconfigurable Integrated Low-Pass Filter for 5G Compatible Software Defined Radio Solutions

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 734
Author(s):  
Karolis Kiela ◽  
Marijan Jurgo ◽  
Vytautas Macaitis ◽  
Romualdas Navickas
Keyword(s):  
Software Defined Radio ◽  
Dynamic Range ◽  
Noise Figure ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Filter Performance ◽  
Low Pass ◽  
Bandwidth Tuning

This article presents a wideband reconfigurable integrated low-pass filter (LPF) for 5G NR compatible software-defined radio (SDR) solutions. The filter uses Active-RC topology to achieve high linearity performance. Its bandwidth can be tuned from 2.5 MHz to 200 MHz, which corresponds to a tuning ratio of 92.8. The order of the filter can be changed between the 2nd, 4th, or 6th order; it has built-in process, voltage, and temperature (PVT) compensation with a tuning range of ±42%; and power management features for optimization of the filter performance across its entire range of bandwidth tuning. Across its entire order, bandwidth, and power configuration range, the filter achieves in-band input-referred third-order intercept point (IIP3) between 32.7 dBm and 45.8 dBm, spurious free dynamic range (SFDR) between 63.6 dB and 79.5 dB, 1 dB compression point (P1dB) between 9.9 dBm and 14.1 dBm, total harmonic distortion (THD) between −85.6 dB and −64.5 dB, noise figure (NF) between 25.9 dB and 31.8 dB and power dissipation between 1.19 mW and 73.4 mW. The LPF was designed and verified using 65 nm CMOS process; it occupies a 0.429 mm2 area of silicon and uses a 1.2 V supply.

Design and Simulation of Switched Capacitor Filter for Speed Change Parameter Converter

2013 ◽  
Vol 562-565 ◽  
pp. 1132-1136
Author(s):  
Xiao Wei Liu ◽  
Jian Yang ◽  
Song Chen ◽  
Liang Liu ◽  
Rui Zhang ◽  
...  
Keyword(s):  
Stop Band ◽  
Cutoff Frequency ◽  
Rapid Change ◽  
Pass Band ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
The Time Domain

In this paper, we design a high-order switched capacitor filter for rapid change parameter converter. This design uses a structure which consists of three biquads filter sub-units. The design is a 6th-order SC elliptic low-pass filter, and the sample frequency is 250 kHz. By the MATLAB Simulink simulation, the system can meet the design requirements in the time domain. In this paper, the 6th-order switched capacitor elliptic low-pass filter was implemented under 0.5 um CMOS process and simulated in Cadence. The final simulation results show that the pass-band cutoff frequency is 10 kHz, and the maximum pass-band ripple is about 0.106 dB. The stop-band cutoff frequency is 20 kHz, and the minimum stop-band attenuation is 74.78 dB.

A 16.4 nW, Sub-1 V, Resistor-Less Voltage Reference with BJT Voltage Divider

2018 ◽  
Vol 27 (13) ◽  
pp. 1850206 ◽  
Author(s):  
Qingshan Yang ◽  
Peiqing Han ◽  
Niansong Mei ◽  
Zhaofeng Zhang
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Voltage Divider ◽  
Total Power ◽  
Cmos Process ◽  
Operating Voltage ◽  
Voltage Reference ◽  
Ultra Low Power ◽  
Silicon Area ◽  
Total Power Consumption

A 16.4[Formula: see text]nW, sub-1[Formula: see text]V voltage reference for ultra-low power low voltage applications is proposed. This design reduces the operating voltage to 0.8[Formula: see text]V by a BJT voltage divider and decreases the silicon area considerably by eliminating resistors. The PTAT and CTAT are based on SCM structures and a scaled-down [Formula: see text], respectively, to improve the process insensitivity. This work is fabricated in 0.18[Formula: see text][Formula: see text]m CMOS process with a total area of 0.0033[Formula: see text]mm2. Measured results show that it works properly for supply voltage from 0.8[Formula: see text]V to 2[Formula: see text]V. The reference voltage is 467.2[Formula: see text]mV with standard deviation ([Formula: see text]) being 12.2 mV and measured TC at best is 38.7[Formula: see text]ppm/[Formula: see text]C ranging from [Formula: see text]C to 60[Formula: see text]C. The total power consumption is 16.4[Formula: see text]nW under the minimum supply voltage at 27[Formula: see text]C.

A New Small-Sized Non-Dispersive Infrared (NDIR) Sensor and its Drive/Readout Circuits

2016 ◽  
Author(s):  
Paul C.-P. Chao ◽  
Li-Chi Hsu ◽  
Trong-Hieu Tran
Keyword(s):  
Pulse Width Modulation ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Analog To Digital ◽  
Readout Circuits ◽  
Low Pass ◽  
Driver Circuit ◽  
Module Size ◽  
Gas Chamber

A new miniaturized, non-dispersive, infrared (NDIR) sensor for CO2 intended to be installed in mobile phones and its drive/readout circuits are presented in this study. A typical NDIR sensor consists of three main components; an infrared (IR) light-emitter (light source), a gas chamber, a photo detector (PD) light receiver) and the associated drive/readout circuits. The geometry of the gas chamber is optimized to minimize the total module size to approximately 10 mm × 5 mm × 5 mm, which is much smaller than commercially-available gas sensors. Driver and readout circuits are successfully designed and taped out. The driver circuit intends to generate pulse width modulation (PWM) signal to control proper dimming of LED. The readout circuit, which acquires small signal from photo detector then converts to digital values, includes amplifier, low pass filter and analog-to-digital converter (ADC). The proposed circuit is fabricated by the TSMC 0.35-μm CMOS process, where the area is 4.527 mm2 while power consumption is 60.16 mW for the whole chip. The resolution is less than 12 ppm along with time constant is 0.1 sec.

The Design of Gm-C Low-Pass Filter for Micromachined Gyroscope

2014 ◽  
Vol 609-610 ◽  
pp. 1072-1076
Author(s):  
Qiu Ye Lv ◽  
Chong He ◽  
Wen Jie Fan ◽  
Yu Feng Zhang ◽  
Xiao Wei Liu
Keyword(s):  
Process Model ◽  
Stop Band ◽  
Cutoff Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Simulation Results ◽  
Micromachined Gyroscope

In this Paper, a 4th-Order Low-Pass Gm-C Filter is Presented. for the Design of Operational Tranconductance Amplifier(OTA), it Adopts the Techniques of Current Division and Current Cancellation. these Techniques can Help to Achieve a Low Transconductance Value. for the Architecture of the 4th-Order Gm-C Filter, it Consists of Two Biquads. the Two Biquads are Cascade Connected. the Gm-C Low-Pass Filter has been Implemented under 0.5 μm CMOS Process Model. the Final Simulation Results Show the Cutoff Frequency of the Filter is 100Hz and the Stop-Band Attenuation is Larger than 60dB. the Power Consumption is Lower than 1mW and the Total Harmonic Distortion(THD) is -55dB.

scholarly journals Noise-Cancelling CMOS Active Inductor and Its Application in RF Band-Pass Filter Design

2010 ◽  
Vol 2010 ◽  
pp. 1-8 ◽  
Author(s):  
Santosh Vema Krishnamurthy ◽  
Kamal El-Sankary ◽  
Ezz El-Masry
Keyword(s):  
Filter Design ◽  
Low Noise ◽  
Total Power ◽  
Active Inductor ◽  
Cmos Process ◽  
Band Pass Filter ◽  
Pass Filter ◽  
Noise Cancelling ◽  
Total Power Consumption ◽  
Band Pass

A CMOS active inductor with thermal noise cancelling is proposed. The noise of the transistor in the feed-forward stage of the proposed architecture is cancelled by using a feedback stage with a degeneration resistor to reduce the noise contribution to the input. Simulation results using 90 nm CMOS process show that noise reduction by 80% has been achieved. The maximum resonant frequency and the quality factor obtained are 3.8 GHz and 405, respectively. An RF band-pass filter has been designed based on the proposed noise cancelling active inductor. Tuned at 3.46 GHz, the filter features total power consumption of 1.4 mW, low noise figure of 5 dB, and IIP3 of −10.29 dBm.

scholarly journals A Power and Area Efficient CMOS Bandgap Reference Circuit with an Integrated Voltage-Reference Branch

2019 ◽  
Author(s):  
Santunu Sarangi ◽  
Dhananjaya Tripathy ◽  
Subhra Sutapa Mohapatra ◽  
Saroj Rout
Keyword(s):  
Total Power ◽  
Cmos Process ◽  
Bandgap Reference ◽  
Voltage Reference ◽  
Temperature Drift ◽  
Silicon Area ◽  
Total Power Consumption ◽  
Reference Circuit ◽  
Reference Design ◽  
Bipolar Device

This work presents a compact and low power bandgap voltage reference design using self-biased current mirror circuit. This design eliminates the standard complementary-to-absolute-temperature (CTAT) bipolar device in the voltage-reference branch, reducing the bipolar area by 20 percent. Instead, the design shares the same bipolar device in the main CTAT branch for generating the reference voltage. An additional benefit of eliminating the voltage-reference branch is the reduction of total power consumption by approximately 30 percent. This novel topology reduces power and area of the core bandgap reference circuit without compromising temperature drift performance. Designed, fabricated and functionally tested in a 0.6 um CMOS process. The simulation result shows the temperature coefficient of this design is 6.3 ppm/C for a temperature range of -40C to 125C$. This bandgap reference design occupies a silicon area of 0.018 mm^2 and draws an average quiescent current of 2 uA from a supply voltage of 3.3-5V. The simulated flicker voltage noise is 4.34 uV/sqrt-Hz at 10 Hz.

scholarly journals A Novel Purely Active Electronically Controllable Configuration for Simulating Resistance in Floating Form

2017 ◽  
Vol 20 (2) ◽  
pp. 90 ◽  
Author(s):  
Mayank Srivastava ◽  
Dinesh Prasad
Keyword(s):  
Cmos Process ◽  
Passive Component ◽  
Ideal Behavior ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Component Matching ◽  
Low Sensitivity ◽  
Frequency Behavior ◽  
Electronically Tunable

This paper proposes a new purely active floating resistance simulation circuit employing two voltage differencing trans-conductance amplifiers (VDTAs). The proposed configuration enjoys following advantageous features; (i) purely active realization (ii) electronically tunable resistance (iii) no requirement of any active/passive component matching constraint (iv) good non-ideal behavior and (v) low sensitivity values. The Influence of VDTA terminal parasitics on high frequency behavior of proposed circuit is also investigated. The workability of proposed resistor simulator has been verified by an application example of voltage mode low-pass filter. To validate the theoretical analysis, SPICE simulations with TSMC 0.18μm CMOS process parameters have been performed. 

scholarly journals Accelerometer-Based Automated Counting of Ten Exercises without Exercise-Specific Training or Tuning

2020 ◽  
Vol 2020 ◽  
pp. 1-6
Author(s):  
Samuel Zelman ◽  
Michael Dow ◽  
Thasina Tabashum ◽  
Ting Xiao ◽  
Mark V. Albert
Keyword(s):  
Physical Therapy ◽  
Wearable Sensors ◽  
Training And Development ◽  
The Body ◽  
Activity Tracking ◽  
Counting System ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Threshold Crossing ◽  
Low Pass

Measuring physical activity using wearable sensors is essential for quantifying adherence to exercise regiments in clinical research and motivating individuals to continue exercising. An important aspect of wearable activity tracking is counting particular movements. One limitation of many previous models is the need to design the counting for a specific exercise. However, during physical therapy, some movements are unique to the patient and also valuable to track. To address this, we create an automatic repetition counting system that is flexible enough to measure multiple distinct and repeating movements during physical therapy without being trained on the specific motion. Accelerometers, using smartphones, were attached to the body or held by participants to track repetitive motions during different exercises. 18 participants completed a series of 10 exercises for 30 seconds, including arm circles, bicep curls, bridges, sit-ups, elbow extensions, leg lifts, lunges, push-ups, squats, and upper trunk rotations. To count the repetitions of each exercise, we apply three analysis techniques: (a) threshold crossing, (b) threshold crossing with a low-pass filter, and (c) Fourier transform. The results demonstrate that arm circles and push-ups can be tracked well, while less periodic and irregular motions such as upper trunk rotations are more difficult. Overall, threshold crossing with low-pass filtering achieves the best performance among these methods. We conclude that the proposed automatic counting system is capable of tracking exercise repetition without prior training and development for that activity.

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