A Fully Differential PPG Readout Amplifier with a Reconfigurable Bandwidth for Power Minimization

Author(s):  
Zeqi Zhang ◽  
Shuang Song ◽  
Tian Yang ◽  
Mengyu Li ◽  
Zheng Gu ◽  
...  
2019 ◽  
Vol 13 (3) ◽  
pp. 5334-5346
Author(s):  
M. N. Nguyen ◽  
L. Q. Nguyen ◽  
H. M. Chu ◽  
H. N. Vu

In this paper, we report on a SOI-based comb capacitive-type accelerometer that senses acceleration in two lateral directions. The structure of the accelerometer was designed using a proof mass connected by four folded-beam springs, which are compliant to inertial displacement causing by attached acceleration in the two lateral directions. At the same time, the folded-beam springs enabled to suppress cross-talk causing by mechanical coupling from parasitic vibration modes. The differential capacitor sense structure was employed to eliminate common mode effects. The design of gap between comb fingers was also analyzed to find an optimally sensing comb electrode structure. The design of the accelerometer was carried out using the finite element analysis. The fabrication of the device was based on SOI-micromachining. The characteristics of the accelerometer have been investigated by a fully differential capacitive bridge interface using a sub-fF switched-capacitor integrator circuit. The sensitivities of the accelerometer in the two lateral directions were determined to be 6 and 5.5 fF/g, respectively. The cross-axis sensitivities of the accelerometer were less than 5%, which shows that the accelerometer can be used for measuring precisely acceleration in the two lateral directions. The accelerometer operates linearly in the range of investigated acceleration from 0 to 4g. The proposed accelerometer is expected for low-g applications.


Author(s):  
Jorge Pérez Bailón ◽  
Jaime Ramírez-Angulo ◽  
Belén Calvo ◽  
Nicolás Medrano

This paper presents a Variable Gain Amplifier (VGA) designed in a 0.18 μm CMOS process to operate in an impedance sensing interface. Based on a transconductance-transimpedance (TC-TI) approach with intermediate analog-controlled current steering, it exhibits a gain ranging from 5 dB to 38 dB with a constant bandwidth around 318 kHz, a power consumption of 15.5 μW at a 1.8 V supply and an active area of 0.021 mm2.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 509
Author(s):  
Iqra Hameed ◽  
Pham-Viet Tuan ◽  
Mario R. Camana ◽  
Insoo Koo

In this paper, we study the transmit power minimization problem with optimal energy beamforming in a multi-antenna wireless powered communication network (WPCN). The considered network consists of one hybrid access point (H-AP) with multiple antennae and multiple users with a single antenna each. The H-AP broadcasts an energy signal on the downlink, using energy beamforming to enhance the efficiency of the transmit energy. In this paper, we jointly optimize the downlink time allocation for wireless energy transfer (WET), the uplink time allocation for each user to send a wireless information signal to the H-AP, the power allocation to each user on the uplink, and the downlink energy beamforming vectors while controlling the transmit power at the H-AP. It is challenging to solve this non-convex complex optimization problem because it is numerically intractable and involves high computational complexity. We exploit a sequential parametric convex approximation (SPCA)-based iterative method, and propose optimal and sub-optimal solutions for the transmit power minimization problem. All the proposed schemes are verified by numerical simulations. Through the simulation results, we present the performance of the proposed schemes based on the effect of the number of transmit antennae and the number of users in the proposed WPCN. Through the performance evaluation, we show that the SPCA-based joint optimization solution performance is superior to other solutions.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 188
Author(s):  
Žiga Korošak ◽  
Nejc Suhadolnik ◽  
Anton Pleteršek

The aim of this work is to tackle the problem of modulation wave shaping in the field of near field communication (NFC) radio frequency identification (RFID). For this purpose, a high-efficiency transmitter circuit was developed to comply with the strict requirements of the newest EMVCo and NFC Forum specifications for pulse shapes. The proposed circuit uses an outphasing modulator that is based on a digital-to-time converter (DTC). The DTC based outphasing modulator supports amplitude shift keying (ASK) modulation, operates at four times the 13.56 MHz carrier frequency and is made fully differential in order to remove the parasitic phase modulation components. The accompanying transmitter logic includes lookup tables with programmable modulation pulse wave shapes. The modulator solution uses a 64-cell tapped current controlled fully differential delay locked loop (DLL), which produces a 360° delay at 54.24 MHz, and a glitch-free multiplexor to select the individual taps. The outphased output from the modulator is mixed to create an RF pulse width modulated (PWM) output, which drives the antenna. Additionally, this implementation is fully compatible with D-class amplifiers enabling high efficiency. A test circuit of the proposed differential multi-standard reader’s transmitter was simulated in 40 nm CMOS technology. Stricter pulse shape requirements were easily satisfied, while achieving an output linearity of 0.2 bits and maximum power consumption under 7.5 mW.


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