Demonstration of a Novel Alternating Current Hybrid Concept for a Fuel Cell–Battery Hybrid Electric Aircraft

Hybrid electric aircraft offer the potential to decrease emissions from air travel. A new hybrid concept is proposed for a fuel cell-battery hybrid aircraft. In contrast to existing hybrids, the proposed concept puts a battery directly on the AC phases of the motor, which together with a suitable switching circuit superimposes the DC voltage from the battery on the AC voltage of the motor phase providing a voltage boost depending on the battery voltage, which can be used during a high-power demand flight phase. The system is also capable of recharging the battery during flight. The necessary switching architecture was developed and modeled in MATLAB/Simulink to verify the concept and an experimental setup was built for demonstrating the functionality. Simulation and experimental results showed a very good agreement which is very promising for the proposed new hybrid topology.

A Wireless Power Transfer Charger with Hybrid Compensation Topology for Constant Current/Voltage Onboard Charging

Compared with plugged-in chargers, wireless power transfer (WPT) systems for battery chargers have numerous advantages, e.g., safety, efficiency, and convenience. To satisfy the important wireless charging requirements of efficiency and safety of the battery, this paper proposes a constant current/voltage (CC/CV) charging compensation topology with near-communication based on receiving-side hybrid topology switching, which is unaffected by the dynamic loads. The proposed hybrid topology is systematically analyzed by using the M-mode, and the system parameters are designed to satisfy the constraints of zero phase angle (ZPA) and the specified CC output. In the CV mode, one shunt capacitor is employed to the compensation topology for the CV output and ZPA realization. Both the CC and CV modes are operated under the conditions of zero voltage switching (ZVS) for reducing the loss of the WPT systems. The proposed hybrid compensation topology is controlled by the receiving side and does not require real-time communication to avoid sophisticated control logic. Finally, a 1.1-kW experimental prototype charger based on DS-LCC and LCC-S topologies was established to verify the charging performance of the proposed WPT systems. The maximum efficiency of the proposed WPT charger was found to be approximately 91%. The experimental results were consistent with those of the theoretical analysis.

Extended hybrid cross-switched multilevel inverter circuit topology

Purpose Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems. Design/methodology/approach The proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted. Findings This paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation. Originality/value The hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

A 1.8 V high-speed 8-bit hybrid DAC with integrated rail-to-rail buffer amplifier in CMOS 180 nm

Purpose The purpose of this paper is to present the performance of an 8-bit hybrid DAC which is suitable for wireless application or part of a built-in test block for ADC. The hybrid architecture used is the combination of thermometer coding and binary-weighted resistor architectures. Design/methodology/approach The conventional DAC topology performance tends to degrade at high-resolution applications. A hybrid topology, which combines an equal number of bits of thermometer coding and binary-weighted resistor architectures operating at higher sampling frequency, was proposed in this work. The die was fabricated in 180 nm CMOS process technology with a supplied voltage of 1.8 V. Findings Measured results showed that the DNL and INL errors are within −1 to +1 LSB and −0.9 to +0.9 LSB, respectively for the input range of 0.9 V at the clock rate of 200 MHz, and this DAC was proven monotonic. This 0.068 mm2 DAC consumed 12.6 mW for the data conversion. Originality/value This paper is of value in showing the equal division of bits from thermometer coding and binary-weighted resistor architectures provides smaller die size and enhances the performance of hybrid DAC, in terms of linearity, which are DNL and INL errors and guarantees monotonicity at higher sampling frequency.