Failure Analysis enhancement by evaluating the Photoelectric Laser Stimulation impact on mixed-mode ICs

Abstract This paper presents a case study on scan test reject in a mixed mode IC. It focuses on the smart use of combined mature FA techniques, such as Soft Defect Localization (SDL) and emission microscopy (EMMI), to localize a random scan test anomaly at the silicon bulk level.

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Combine Micro-Probing and OBIRCH to Catch Non-Recognizable Fault in RF and Mixed-Mode Integrated Circuits

ISTFA 2007: Conference Proceedings from the 33rd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2007p0327 ◽

2007 ◽

Author(s):

Cha-Ming Shen ◽

Yen-Long Chang ◽

Lian-Fon Wen ◽

Tan-Chen Chuang ◽

Shi-Chen Lin ◽

...

Keyword(s):

Integrated Circuits ◽

Radio Frequency ◽

Failure Analysis ◽

Case Studies ◽

Mixed Mode ◽

Failure Mechanisms ◽

Deep Submicron ◽

Digital Logic ◽

Successful Approach ◽

Cmos Processes

Abstract Highly-integrated radio frequency and mixed-mode devices that are manufactured in deep-submicron or more advanced CMOS processes are becoming more complex to analyze. The increased complexity presents us with many eccentric failure mechanisms that are uniquely different from traditional failure mechanisms found during failure analysis on digital logic applications. This paper presents a novel methodology to overcome the difficulties and discusses two case studies which demonstrate the application of the methodology. Through the case studies, the methodology was proven to be a successful approach. It is also proved how this methodology would work for such non-recognizable failures.

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Dual Port RAM MBIST Failure Analysis Using Time Resolved Dynamic Laser Stimulation

ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2008p0188 ◽

2008 ◽

Author(s):

Jonathan Shaw ◽

Christopher McMahon ◽

Yin Shyang Ng ◽

Félix Beaudoi

Keyword(s):

Failure Analysis ◽

Embedded Memory ◽

Complementary Information ◽

Time Resolved ◽

Laser Stimulation ◽

Specific Indication ◽

Read Operation ◽

Site Localization

Abstract This paper presents the use of Dynamic Laser Stimulation (DLS) and Time-Resolved DLS (TR-DLS) to provide fail site localization and complementary information on a failed embedded memory IC. In this study, an embedded dual port RAM within a 90nm IC that failed one of the Memory Built-In Self Tests (MBISTs) was investigated. This technique rapidly localized the failing area within the memory read/write circuitry. The TR-DLS provided maps for each operation of the MBIST pattern. With this information, the failure was clearly identified as a read operation failure. The TR-DLS technique also provided much refined site signature (down to just one net) within the sense amp of the Port B of the dual port RAM. This information provided very specific indication on how to improve the operation of that particular sense amp circuitry within the dual port RAM Memory.

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Photoelectric Laser Stimulation applied to Latch-Up phenomenon and localization of parasitic transistors in an industrial failure analysis laboratory

Microelectronics Reliability ◽

10.1016/j.microrel.2011.06.050 ◽

2011 ◽

Vol 51 (9-11) ◽

pp. 1658-1661 ◽

Cited By ~ 5

Author(s):

R. Llido ◽

J. Gomez ◽

V. Goubier ◽

N. Froidevaux ◽

L. Dufayard ◽

...

Keyword(s):

Failure Analysis ◽

Laser Stimulation ◽

Analysis Laboratory ◽

Latch Up

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Yield and Failure Analysis of FinFET Source to Drain Leakage in 12nm Technology

ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2020p0038 ◽

2020 ◽

Author(s):

Felix Beaudoin ◽

Satish Kodali ◽

Rohan Deshpande ◽

Wayne Zhao ◽

Edmund Banghart ◽

...

Keyword(s):

Failure Analysis ◽

Fault Localization ◽

Detailed Characterization ◽

Laser Stimulation ◽

Emission Microscopy ◽

Scan Chain ◽

Multiple Samples ◽

Tem Lamella ◽

Diffusion Activation

Abstract Fault localization using both dynamic laser stimulation and emission microscopy was used to localize the failing transistors within the failing scan chain latch on multiple samples. Nanoprobing was then performed and the source to drain leakage in N-type FinFETs was identified. After extensive detailed characterization, it was concluded that the N-type dopant signal was likely due to projections from the source/drain regions included in the TEM lamella. Datamining identified the scan chain fail to be occurring uniquely for a specific family of tools used during source/drain implant diffusion activation. This paper discusses the processes involved in yield delta datamining of FinFET and its advantages over failure characterization, fault localization, nanoprobing, and physical failure analysis.

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