Impact of metal silicide layout covering source/drain diffusion region on minimization of parasitic resistance of triple-gate SOI MOSFET and proposal of practical design guideline
2009 ◽
Vol 53
(9)
◽
pp. 959-971
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Keyword(s):
2003 ◽
Vol 50
(11)
◽
pp. 2303-2305
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Keyword(s):
2003 ◽
Vol 19
(3)
◽
pp. 347-350
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Keyword(s):
1988 ◽
Vol 46
◽
pp. 848-849
1980 ◽
Vol 38
◽
pp. 266-269
Keyword(s):