Morphological and structural study of integrated circuits using XTEM and HREM
There is increasing interest in the use of cross-sectional transmission electron microscopy (XTEM) to understand fundamental and technological problems associated with fabrication of integrated circuit (IC). This is because with XTEM it is possible to obtain exact morphological configuration and structure at atomic level of different layers and interfaces. For the study of a MOS device we used slightly modified XTEM specimen preparation technique than reported by other authors. To monitor region of interest during mechanical preparation two techniques were used as illustrated in Fig.1. First by glueing two slabs (10 × 4 mm2) of wafer each exactly identical in terms of geometrical dimension and device features and second by glueing a transparent glass plate on the top of wafer. The epoxy has higher ion beam etching rate than other materials so to obtain uniform thinning, ion beam was centered slightly away from the epoxy line . The thinned specimens were observed under Philips CM-30 electron microscope.