A Selected Area Planar TEM (SAPTEM) Sample Preparation Procedure for Failure Analysis of Integrated Circuits

1998 ◽  
Author(s):  
S. Subramanian ◽  
P. Schani ◽  
E. Widener ◽  
P. Liston ◽  
J. Moss ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Cross Section ◽  
Ion Beam ◽  
Preparation Technique ◽  
Mechanical Grinding ◽  
Cross Sectional ◽  
Plan View ◽  
The Cross

Abstract A selected area planar TEM (SAPTEM) sample preparation technique for failure analysis of integrated circuits using a transmission electron microscope has been developed. The technique employs a combination of mechanical grinding, selective wet/dry chemical etching (if required) and a two step focused ion beam IIFIB) milling. The mechanical grinding steps include: (a) a backside grind to achieve a die thickness less than 30 µm, (b) the support half ring glue, and (c) a cross-section grind from one side to reach less than 35 pm to the failing site. A selective wet or dry chemical etch is applied before, between,, or after FIB thinning depending on the nature of problem and device components. The FIB milling steps involve: (is) a high ion current cross-sectional cut to reach as close as 5-8 µm to the area of interest (b) a final planar thinning with the ion beam parallel to the surface of the die. The plan view procedure offers unique geometric advantage over the cross-section method for failure analysis of problems that are limited to silicon or certain layers of the device. Iln the cross-sectional approach, a thin section (thickness less than 250 µm) of a device is available for failure analysis, whereas in the planar procedure a 20 µm2 area of any layer (thickness less than 250 µm) of the device is available. The above advantage has been successfully exploited to identify and solve the following prablems in fast static random access memories (FSRAM): (i) random gateoxide rupture that resulted in single bit failures, (ii) random dislocations from the buried contact trenching that caused single bit failures and general silicon defectivity (e.g. implant damage and spacer edge defects), and (iii) interracial reactions.

scholarly journals Having Your Cake and Eating It Too: A Procedure for Obtaining Plan View and Cross Section TEM Images from the Same Site

2005 ◽  
Vol 13 (1) ◽  
pp. 26-29 ◽  
Author(s):  
R.B. Irwin ◽  
A. Anciso ◽  
P.J. Jones ◽  
C. Patton
Keyword(s):  
Sample Preparation ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Bulk Material ◽  
Ion Beam ◽  
Preparation Technique ◽  
Ion Milling ◽  
Plan View ◽  
Transmission Electron ◽  
Final Sample

Sample preparation for Transmission Electron Microscopy (TEM) is usually performed such that the final sample orientation is either a cross section or a plan view of the bulk material, as shown schematically in Figure 1. The object of any sample preparation technique, for either of these two orientations, is to thin a selected volume of the sample from its initial bulk state to electron transparency, ~ 100nm thick. In doing so, the final sample must be mechanically stable, vacuum compatible, and, most of all, unchanged from the initial bulk material. Many techniques have been used to achieve this goal: cleaving, sawing, mechanical polishing, chemical etching, ion milling, focused ion beam (FIB) milling, and many others.

Fibxtem— Focussed Ion Beam Milling for TEM Sample Preparation

1991 ◽  
Vol 254 ◽  
Author(s):  
David P. Basile ◽  
Ron Boylan ◽  
Brian Baker ◽  
Kathy Hayes ◽  
David Soza
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Protective Layer ◽  
Preparation Technique ◽  
Tem Analysis ◽  
Cross Sectional ◽  
Area Of Interest ◽  
Focussed Ion Beam

AbstractIn the semiconductor industry, shrinking geometries and increasing process complexity have greatly increased the demand for TEM analysis of specific submicron regions. Until recently, samples of this nature have been difficult if not impossible to prepare. We have combined cross-sectional TEM sample preparation (XTEM) and the precise material sputtering of focussed ion beam milling (FIB) to thin samples to electron transparency. We call this sample preparation technique FIBXTEM.Three advantages of this technique are: 1) The area of interest can be analyzed in the scanning electron microscope before final thinning; 2) Any specific defect area becomes a candidate for TEM analysis, including failed sub-micron structures; and 3) Samples are generally artifact-free and of uniform thickness.Key elements of the FIBXTEM technique include precision planar polishing, unique holders for mounting and transferring samples between systems, and the FIB-induced deposition of a sacrificial protective layer over the area of interest during ion thinning.This technique extends the use of TEM analysis into new areas of semiconductor process development and failure analysis. Recent applications for materials problem solving and failure analysis are discussed.

Automated Diagonal Slice and View Solution for 3D Device Structure Analysis

2018 ◽  
Author(s):  
Sang Hoon Lee ◽  
Jeff Blackwood ◽  
Stacey Stone ◽  
Michael Schmidt ◽  
Mark Williamson ◽  
...  
Keyword(s):  
Cross Section ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Image Data ◽  
Planar Surface ◽  
Device Structure ◽  
Cross Sectional ◽  
Device Structures ◽  
The Cross ◽  
Planar Analysis

Abstract The cross-sectional and planar analysis of current generation 3D device structures can be analyzed using a single Focused Ion Beam (FIB) mill. This is achieved using a diagonal milling technique that exposes a multilayer planar surface as well as the cross-section. this provides image data allowing for an efficient method to monitor the fabrication process and find device design errors. This process saves tremendous sample-to-data time, decreasing it from days to hours while still providing precise defect and structure data.

Cutting-Edge Sample Preparation from FIB to Ar Concentrated Ion Beam Milling of Advanced Semiconductor Devices

2020 ◽  
Author(s):  
C.S. Bonifacio ◽  
P. Nowakowski ◽  
R. Li ◽  
M.L. Ray ◽  
P.E. Fischione ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Semiconductor Devices ◽  
Specific Area ◽  
Cutting Edge ◽  
Preparation Technique ◽  
Ion Milling ◽  
Sample Preparation Technique

Abstract Fast and accurate examination from the bulk to the specific area of the defect in advanced semiconductor devices is critical in failure analysis. This work presents the use of Ar ion milling methods in combination with Ga focused ion beam (FIB) milling as a cutting-edge sample preparation technique from the bulk to specific areas by FIB lift-out without sample-preparation-induced artifacts. The result is an accurately delayered sample from which electron-transparent TEM specimens of less than 15 nm are obtained.

Specific Area Planar and Cross-Sectional Lift-Out Techniques: Procedures and Novel Applications

2000 ◽  
Author(s):  
Raghaw S. Rai ◽  
Swaminathan Subramanian ◽  
Stewart Rose ◽  
James Conner ◽  
Phil Schani ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Ion Beam ◽  
Specific Area ◽  
Cross Sectional ◽  
Site Specific ◽  
Focussed Ion Beam ◽  
Lattice Images ◽  
Novel Applications

Abstract Conventional focussed ion beam (FIB) based specific area transmission electron microscopy (TEM) sample preparation techniques usually requires complex grinding and gluing steps before final FIB thinning of the sample to electron transparency (<0.25 μm). A novel technique known as lift-out, plucking or pullout method that eliminates all the pre-FIB sample preparation has been developed for specific area TEM sample preparation by several authors. The advantages of the lift-out procedure include reduced sample preparation time and possibility of specific area TEM sample preparation of most components of integrated circuit with almost no geometric or dimensional limitations. In this paper, details of liftout method, developed during the present work, for site specific x-sectional and a new site specific planar sample preparation are described. Various methodologies are discussed to maximize the success rate by optimizing the factors that affect the technique. In failure analysis, the geometric and dimensional flexibility offered by the lift-out technique can be used to prepare specific area TEM sample of back thinned die, small particles and packaged parts. Such novel applications of lift-out technique in failure analysis are discussed with the examples of TEM results obtained from GaAs and Si based devices. Importantly, it was possible to obtain high resolution lattice images from the lift-out samples transferred on holey carbon supported 3mm copper grids.

Optimization of TEM Sample Preparation to Reduce the Overlapping of TEM Images

2014 ◽  
Author(s):  
Shuqing Duan ◽  
Summer Chen ◽  
Paul Yu ◽  
Ming Li ◽  
Mark Zhang ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Cross Section ◽  
Ion Beam ◽  
Top Down ◽  
Preparation Methods ◽  
Plan View ◽  
Transmission Electron ◽  
Focus Ion Beam ◽  
Sample Preparation Methods ◽  
Section Sample

Abstract This paper reports optimized Transmission Electron Microscopy (TEM) sample preparation methods with Focus Ion Beam (FIB), which are used to reduce or avoid the overlapping of TEM images. Several examples of optimized cross-section sample preparation on 38nm and 45nm pitch are provided with general and novel FIB methods. And its application to plan view TEM sample preparation is also shown. The results establish that the proposed method is useful to reduce or remove pattern overlapping effects in dense structures and can produce higher quality TEM images than can be obtained using conventional top-down FIB-based TEM preparation methods.

The Challenge and Methods of TEM Cross-Sectioning of < 0.25 Micron Plugs

1998 ◽  
Vol 523 ◽  
Author(s):  
C. Amy Hunt ◽  
Yuhong Zhang ◽  
David Su
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Cross Section ◽  
Adhesion Layer ◽  
Cross Sectional ◽  
Transmission Electron ◽  
Sectional Plane ◽  
Preparation Techniques

AbstractTransmission electron microscopy (TEM) is a useful tool in process evaluation and failure analysis for semiconductor industries. A common focus of semiconductor TEM analyses is metalization vias (plugs) and it is often desirable to cross-section through a particular one. If the cross-sectional plane deviates away from the center of the plug, then the thin adhesion layer around the plug will be blurred by surrounding materials such as the inter-layer dielectric and the plug material. The importance of these constraints, along with the difficulty of precision sample preparation, has risen sharply as feature sizes have fallen to 0.25 μm and below. The suitability of common sample preparation techniques for these samples is evaluated.

scholarly journals Die Backside FIB Preparation for Identification and Characterization of Metal Voids

1999 ◽  
Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Milling Process ◽  
Plan View ◽  
Metal Interconnects

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

Investigation of Cell-Sensor Hybrid Structures by Focused Ion Beam (FIB) Technology

2006 ◽  
Vol 983 ◽  
Author(s):  
Andreas Heilmann ◽  
Frank Altmann ◽  
Andreas Cismak ◽  
Werner Baumann ◽  
Mirko Lehmann
Keyword(s):  
Cross Section ◽  
Mammalian Cells ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Three Dimensional ◽  
Nerve Cells ◽  
Cross Sectional ◽  
Dimensional Reconstruction ◽  
The Cross ◽  
Silicon Interface

AbstractFor the investigation of the adhesion of mammalian cells on a semiconductor biosensor structure, nerve cells on silicon neurochips were prepared for scanning electron microscopy investigations (SEM) and cross-sectional preparation by focused ion beam technology (FIB). The cross-sectional pattern demonstrates the focal adhesion points of the nerve cells on the chip. Finally, SEM micrographs were taken parallel to the FIB ablation to investigate the cross section of the cells slice by slice in order to demonstrate the spatial distribution of focal contact positions for a possible three-dimensional reconstruction of the cell-silicon interface.

Morphological and structural study of integrated circuits using XTEM and HREM

1990 ◽  
Vol 48 (4) ◽  
pp. 630-631
Author(s):  
L.M. Bharadwaj ◽  
L.M. Gantcheva ◽  
S. Simov ◽  
G. Balossier ◽  
J. Faure ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Ion Beam ◽  
Etching Rate ◽  
Glass Plate ◽  
Region Of Interest ◽  
Specimen Preparation ◽  
Preparation Technique ◽  
Cross Sectional ◽  
Mechanical Preparation

There is increasing interest in the use of cross-sectional transmission electron microscopy (XTEM) to understand fundamental and technological problems associated with fabrication of integrated circuit (IC). This is because with XTEM it is possible to obtain exact morphological configuration and structure at atomic level of different layers and interfaces. For the study of a MOS device we used slightly modified XTEM specimen preparation technique than reported by other authors. To monitor region of interest during mechanical preparation two techniques were used as illustrated in Fig.1. First by glueing two slabs (10 × 4 mm2) of wafer each exactly identical in terms of geometrical dimension and device features and second by glueing a transparent glass plate on the top of wafer. The epoxy has higher ion beam etching rate than other materials so to obtain uniform thinning, ion beam was centered slightly away from the epoxy line . The thinned specimens were observed under Philips CM-30 electron microscope.

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