scholarly journals A high-efficiency and compact charge pump with charge recycling scheme and finger boost capacitor

2019 ◽  
Vol 292 ◽  
pp. 01020
Author(s):  
Hui Peng ◽  
Pieter Bauwens ◽  
Herbert De Pauw ◽  
Jan Doutreloigne
Keyword(s):  
Power Supply ◽  
Power Efficiency ◽  
Output Voltage ◽  
High Efficiency ◽  
Charge Pump ◽  
Parasitic Capacitance ◽  
Chip Area ◽  
Charge Recycling ◽  
Compact Charge

A 16-phase 8-branch charge pump with finger boost capacitor is proposed to increase the power efficiency. Compared with the standard capacitor, the finger capacitor can significantly reduce the parasitic capacitance. The proposed four-stage charge pump with finger capacitor can achieve 14.2 V output voltage from a 3 V power supply. The finger capacitor can increase the power efficiency of the charge pump to 60.5% and save chip area as well.

Rack Server Solution in Data Center

2015 ◽  
Author(s):  
Sheng Kang ◽  
Guofeng Chen ◽  
Chun Wang ◽  
Ruiquan Ding ◽  
Jiajun Zhang ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Data Center ◽  
Power Efficiency ◽  
High Performance ◽  
High Efficiency ◽  
High Growth ◽  
General Purpose ◽  
Power Supplies

With the advent of big data and cloud computing solutions, enterprise demand for servers is increasing. There is especially high growth for Intel based x86 server platforms. Today’s datacenters are in constant pursuit of high performance/high availability computing solutions coupled with low power consumption and low heat generation and the ability to manage all of this through advanced telemetry data gathering. This paper showcases one such solution of an updated rack and server architecture that promises such improvements. The ability to manage server and data center power consumption and cooling more completely is critical in effectively managing datacenter costs and reducing the PUE in the data center. Traditional Intel based 1U and 2U form factor servers have existed in the data center for decades. These general purpose x86 server designs by the major OEM’s are, for all practical purposes, very similar in their power consumption and thermal output. Power supplies and thermal designs for server in the past have not been optimized for high efficiency. In addition, IT managers need to know more information about servers in order to optimize data center cooling and power use, an improved server/rack design needs to be built to take advantage of more efficient power supplies or PDU’s and more efficient means of cooling server compute resources than from traditional internal server fans. This is the constant pursuit of corporations looking at new ways to improving efficiency and gaining a competitive advantage. A new way to optimize power consumption and improve cooling is a complete redesign of the traditional server rack. Extracting internal server power supplies and server fans and centralizing these within the rack aims to achieve this goal. This type of design achieves an entirely new low power target by utilizing centralized, high efficiency PDU’s that power all servers within the rack. Cooling is improved by also utilizing large efficient rack based fans for airflow to all servers. Also, opening up the server design is to allow greater airflow across server components for improved cooling. This centralized power supply breaks through the traditional server power limits. Rack based PDU’s can adjust the power efficiency to a more optimum point. Combine this with the use of online + offline modes within one single power supply. Cold backup makes data center power to achieve optimal power efficiency. In addition, unifying the mechanical structure and thermal definitions within the rack solution for server cooling and PSU information allows IT to collect all server power and thermal information centrally for improved ease in analyzing and processing.

scholarly journals High-Efficiency DC–DC Converter with Charge-Recycling Gate-Voltage Swing Control

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 899 ◽  
Author(s):  
Jung-Duk Suh ◽  
Yeong-Ho Yun ◽  
Bai-Sun Kong
Keyword(s):  
Gate Voltage ◽  
Power Efficiency ◽  
High Efficiency ◽  
Cmos Technology ◽  
Test Chip ◽  
Efficient Manner ◽  
Light Load ◽  
Charge Recycling ◽  
Voltage Swing ◽  
Full Swing

This paper proposes a high-efficiency DC–DC converter with charge-recycling gate-voltage swing control with a light load. By achieving a variable gate-voltage swing in a very efficient manner by charge recycling, the power efficiency has been substantially improved due to the lower power consumption and the achieved balance between the switching and conduction losses. A test chip was fabricated using 65-nm CMOS technology. The proposed design reduces the gate-driving loss by up to 87.7% and 47.2% compared to the conventional full-swing and low-swing designs, respectively. The maximum power conversion efficiency was 90.3% when the input and output voltages are 3.3 V and 1.8 V, respectively.

scholarly journals High-efficiency high voltage hybrid charge pump design with an improved chip area

IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Bartas Abaravicius ◽  
Sandy Cochran ◽  
Srinjoy Mitra
Keyword(s):  
High Voltage ◽  
High Efficiency ◽  
Charge Pump ◽  
Pump Design ◽  
Chip Area

A Single-Stage DC Uninterruptible Power Supply

2015 ◽  
Vol 764-765 ◽  
pp. 466-470
Author(s):  
Maoh Chin Jiang ◽  
Bing Jyun Shih
Keyword(s):  
Power Factor ◽  
Power Supply ◽  
Output Voltage ◽  
High Efficiency ◽  
Low Cost ◽  
Single Stage ◽  
Normal Operation ◽  
Uninterruptible Power Supply ◽  
Sinusoidal Input ◽  
Uninterruptible Power

A single-stage DC uninterruptible power supply (UPS) is proposed in this paper. Basically, the proposed converter is an integration result of a power factor correction circuit with a dc-to-dc converter to achieve simple hardware circuit, high efficiency, and low cost for extra UPS function. Under normal operation, a novel two-switch SEPIC converter operates as an ac to dc converter with sinusoidal input current, unity power factor, and low ripple dc output voltage, and as a battery charger if a battery is added. Since both the input boost supply and the output supply can be controlled independently, a fast transient response can be maintained at both the input for active current wave shaping and at the output for good output regulation. When the ac source is in an outage condition, the proposed converter functions as a dc-to-dc buck-boost converter; therefore, the desired dc output voltage can be provided. Finally, some experimental results are presented for verification.

scholarly journals Negative High Voltage DC-DC Converter Using a New Cross-Coupled Structure

2015 ◽  
Vol 10 (3) ◽  
pp. 158-165
Author(s):  
Jun Zhao ◽  
Kyung Ki Kim ◽  
Yong-Bin Kim
Keyword(s):  
High Voltage ◽  
Power Supply ◽  
Power Efficiency ◽  
Current Problem ◽  
Negative Charge ◽  
Supply Voltage ◽  
Charge Pump ◽  
Complete Analysis ◽  
Voltage Gain ◽  
Variable Voltage

In this paper, a negative high voltage DC-DC converter using a new cross-coupled charge pump structure has been proposed, which can solve the shoot-through current problem of the conventional charge pump by using a four clock phase scheme. Also, by switching the power supply to each stage based on the supply voltage, a variable voltage gain can be obtained. A complete analysis of the interaction between the power efficiency, area, and frequency have been presented. The proposed negative charge pump is designed to deliver 40μA with a widesupply range from 2.5V to 5.5V using 0.18μm high voltage LDMOS technology.

A high-efficiency charge pump with charge recycling scheme and finger boost capacitor

Integration ◽  
2020 ◽  
Vol 75 ◽  
pp. 85-90
Author(s):  
Hui Peng ◽  
Herbert De Pauw ◽  
Pieter Bauwens ◽  
Jan Doutreloigne
Keyword(s):  
High Efficiency ◽  
Charge Pump ◽  
Charge Recycling

The Design of Phase Shift Soft Switching Full-Bridge Converter Power Supply Based on UCC3895

2014 ◽  
Vol 511-512 ◽  
pp. 1141-1146
Author(s):  
Zhi Qi Huang ◽  
Jian Guo Song ◽  
Meng Juan Sun
Keyword(s):  
Phase Shift ◽  
Power Supply ◽  
Power Efficiency ◽  
High Efficiency ◽  
Measured Data ◽  
Soft Switching ◽  
The Other ◽  
Conversion Procedure ◽  
Power Switch ◽  
Data Result

A high efficiency full-bridge converter is designed and implemented in this paper. The measured data result from the other converter implemented by IC UCC3895 compares with that of the previous converter. This full-bridge converter of phase shift soft switching can obtain about 92% power efficiency in conversion procedure. This design used L-C resonance circuits to achieve power switch tube soft switching.

scholarly journals Design Topologies of a CMOS Charge Pump Circuit for Low Power Applications

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 676
Author(s):  
Labonnah Farzana Rahman ◽  
Mohammad Marufuzzaman ◽  
Lubna Alam ◽  
Mazlin Bin Mokhtar
Keyword(s):  
Low Power ◽  
Radio Frequency Identification ◽  
Output Voltage ◽  
High Efficiency ◽  
Charge Pump ◽  
Design Methods ◽  
Optimization Techniques ◽  
Cmos Process ◽  
Advantages And Disadvantages ◽  
Continuous Power

Applications such as non-volatile memories (NVM), radio frequency identification (RFID), high voltage generators, switched capacitor circuits, operational amplifiers, voltage regulators, and DC–DC converters employ charge pump (CP) circuits as they can generate a higher output voltage from the very low supply voltage. Besides, continuous power supply reduction, low implementation cost, and high efficiency can be managed using CP circuits in low-power applications in the complementary metal-oxide-semiconductor (CMOS) process. This study aims to figure out the most widely used CP design topologies for embedded systems on the chip (SoC). Design methods have evolved from diode-connected structures to dynamic clock voltage scaling charge pumps have been discussed in this research. Based on the different architecture, operating principles and optimization techniques with their advantages and disadvantages have compared with the final output. Researchers mainly focused on designing the charge pump topologies based on input/output voltage, pumping efficiency, power dissipation, charge transfer capability, design complexity, pumping capacitor, clock frequencies with a minimum load balance, etc. Finally, this review study summarizes with the discussion on the outline of appropriate schemes and recommendations to future researchers in selecting the most suitable CP design methods for low power applications.

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