Ion-Implantation for Semiconductor Device Fabrication

1980 ◽  
Vol 26 (9) ◽  
pp. 502-509
Author(s):  
Amarjit Singh
1988 ◽  
Vol 144 ◽  
Author(s):  
J. P. Donnelly ◽  
K. K. Anderson ◽  
J. D. Woodhouse ◽  
W. D. Goodhue ◽  
D. Yap ◽  
...  

ABSTRACTIon-beam-assisted etching of GaAs/AlGaAs and InP/GaInAsP, ion-beam disordering of GaAs/AlGaAs multiple-quantum-well structures, and ion implantation in InP are discussed.


ESSDERC ’89 ◽  
1989 ◽  
pp. 33-36
Author(s):  
T. Harms ◽  
K. Goser ◽  
U. Hilleringmann ◽  
W. Fahrner ◽  
K. Oppermann

Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions


2013 ◽  
Vol 341 ◽  
pp. 181-210 ◽  
Author(s):  
S.K. Tripathi

High-energy electron, proton, neutron, photon and ion irradiation of semiconductor diodes and solar cells has long been a topic of considerable interest in the field of semiconductor device fabrication. The inevitable damage production during the process of irradiation is used to study and engineer the defects in semiconductors. In a strong radiation environment in space, the electrical performance of solar cells is degraded due to direct exposure to energetically charged particles. A considerable amount of work has been reported on the study of radiation damage in various solar cell materials and devices in the recent past. In most cases, high-energy heavy ions damage the material by producing a large amount of extended defects, but high-energy light ions are suitable for producing and modifying the intrinsic point defects. The defects can play a variety of electronically active roles that affect the electrical, structural and optical properties of a semiconductor. This review article aims to present an overview of the advancement of research in the modification of glassy semiconducting thin films using different types of radiations (light, proton and swift heavy ions). The work which has been done in our laboratory related to irradiation induced effects in semiconducting thin films will also be compared with the existing literature.


2001 ◽  
Vol 684 ◽  
Author(s):  
Jane P. Chang

Recognizing that the traditional engineering education training is often inadequate in preparing the students for the challanges presented by this industry's dynamic environment and insufficient to meet the empoyer's criteria in hiring new engineers, a new curriculum on Semiconductor Manufacturing is instituted in the Chemical Engineering Department at UCLA to train the students in various scientific and technologica areas that are pertinenet to the microelectronics industries. This paper describes this new mutidisciplinary curriculum that provides knowledge and skills in semiconductor manufacturing through a series ofcourses that emphasize on the application of fundamenta engineeering disciplines in solid-state physics, materials science of semiconductors, and chemical processing. The curriculum comprises three major components:(1)a comprehensive course curriculum in semiconductor manufacturing; (2) a laboratory for hands-on training in semiconductor device fabrication; (3) design of experiments. The capstone laboratory course is designed to strengthen students’ training in “unit operatins” used in semicounductor manufacturing and allow them to practice engineering principles using the state-of-the-art experimental setup. It comprises the most comprehensive training(seven photolithographic steps and numero0us chemical processes)in fabricating and testing complementary metal-oxide-semiconductor (CMOS) devices. This curriculum is recentyaccredited by the Accreditation Board for Engineering and Technology(ABET).


Author(s):  
William J. Arora ◽  
Sybren Sijbrandij ◽  
Lewis Stern ◽  
John Notte ◽  
Henry I. Smith ◽  
...  

2004 ◽  
Vol 10 (4) ◽  
pp. 462-469 ◽  
Author(s):  
Wolf-Dieter Rau ◽  
Alexander Orchowski

We present and review dopant mapping examples in semiconductor device structures by electron holography and outline their potential applications for experimental investigation of two-dimensional (2D) dopant diffusion on the nanometer scale. We address the technical challenges of the method when applied to transistor structures with respect to quantification of the results in terms of the 2Dp–njunction potential and critically review experimental boundary conditions, accuracy, and potential pitfalls. By obtaining maps of the inner electrostatic potential before and after anneals typically used in device processing, we demonstrate how the “vertical” and “lateral” redistribution of boron during device fabrication can directly be revealed. Such data can be compared with the results of process simulation to extract the fundamental parameters for dopant diffusion in complex device structures.


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