Mapping of Process-Induced Dopant Redistributions by Electron Holography

2004 ◽  
Vol 10 (4) ◽  
pp. 462-469 ◽  
Author(s):  
Wolf-Dieter Rau ◽  
Alexander Orchowski
Keyword(s):  
Semiconductor Device ◽  
Device Fabrication ◽  
Electron Holography ◽  
Dopant Diffusion ◽  
Fundamental Parameters ◽  
Device Processing ◽  
Device Structures ◽  
Before And After ◽  
Potential Applications ◽  
Junction Potential

We present and review dopant mapping examples in semiconductor device structures by electron holography and outline their potential applications for experimental investigation of two-dimensional (2D) dopant diffusion on the nanometer scale. We address the technical challenges of the method when applied to transistor structures with respect to quantification of the results in terms of the 2Dp–njunction potential and critically review experimental boundary conditions, accuracy, and potential pitfalls. By obtaining maps of the inner electrostatic potential before and after anneals typically used in device processing, we demonstrate how the “vertical” and “lateral” redistribution of boron during device fabrication can directly be revealed. Such data can be compared with the results of process simulation to extract the fundamental parameters for dopant diffusion in complex device structures.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Advanced Single-Wafer Sequential Multiprocessing Techniques for Semiconductor Device Fabrication

1989 ◽  
Vol 146 ◽  
Author(s):  
Mehrdad M. Moslehi ◽  
Cecil Davis
Keyword(s):  
Microwave Plasma ◽  
Semiconductor Device ◽  
Future Trend ◽  
Device Fabrication ◽  
Manufacturing Cost ◽  
Layer Transition ◽  
Device Structures ◽  
Equipment Utilization ◽  
Process Energy

ABSTRACTSingle-Wafer Integrated in-situ Multiprocessing (SWIM) is recognized as the future trend for advanced microelectronics production in flexible fast turn-around computer-integrated semiconductor manufacturing environments. The SWIM equipment technology and processing methodology offer enhanced equipment utilization, improved process reproducibility and yield, and reduced chip manufacturing cost. They also provide significant capabilities for fabrication of new and improved device structures. This paper describes the SWIM techniques and presents a novel single-wafer advanced vacuum multiprocessing technology developed based on the use of multiple process energy/activation sources (lamp heating and remote microwave plasma) for multilayer epitaxial and polycrystalline semiconductor as well as dielectric film processing. Based on this technology, multilayer in-situ-doped homoepitaxial silicon and heteroepitaxial strained layer Si/GexSil-x/Si structures have been grown and characterized. The process control and the ultimate interfacial abruptness of the layer-to-layer transition widths in the device structures prepared by this technology will challenge the MBE techniques in multilayer epitaxial growth applications.

scholarly journals New Approaches in Flexible Organic Field-Effect Transistors (FETs) Using InClPc

Materials ◽  
2019 ◽  
Vol 12 (10) ◽  
pp. 1712 ◽  
Author(s):  
María Elena Sánchez-Vergara ◽  
Leon Hamui ◽  
Sergio González Habib
Keyword(s):  
Optical Properties ◽  
Indium Tin Oxide ◽  
Field Effect ◽  
Semiconductor Device ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Deposition Process ◽  
Device Fabrication ◽  
Organic Field Effect Transistors ◽  
Potential Applications

Organic semiconductor materials have been the center of attention because they are scalable, low-cost for device fabrication, and they have good optical properties and mechanical flexibility, which encourages their research. Organic field-effect transistors (OFETs) have potential applications, specifically in flexible and low-cost electronics such as portable and wearable technologies. In this work we report the fabrication of an InClPc base flexible bottom-gate/top-contact OFET sandwich, configured by the high-evaporation vacuum technique. The gate substrate consisted of a bilayer poly(ethylene terephthalate) (PET) and indium–tin oxide (ITO) with nylon 11/Al2O3. The device was characterized by different techniques to determine chemical stability, absorbance, transmittance, bandgap, optical properties, and electrical characteristics in order to determine its structure and operational properties. IR spectroscopy verified that the thin films that integrated the device did not suffer degradation during the deposition process, and there were no impurities that affected the charge mobility in the OFET. Also, the InClPc semiconductor IR fingerprint was present on the deposited device. Surface analysis showed evidence of a nonhomogeneous film and also a cluster deposition process of the InClPc. Using the Tauc model, the device calculated indirect bandgap transitions of approximately 1.67 eV. The device’s field effect mobility had a value of 36.2 cm2 V−1 s−1, which was superior to mobility values obtained for commonly manufactured OFETs and increased its potential to be used in flexible organic electronics. Also, a subthreshold swing of 80.64 mV/dec was achieved and was adequate for this kind of organic-based semiconductor device. Therefore, semiconductor functionality is maintained at different gate voltages and is transferred accurately to the film, which makes these flexible OFETs a good candidate for electronic applications.

Applications of Laser Annealing in IC Fabrication

1982 ◽  
Vol 13 ◽  
Author(s):  
L.D. Hess ◽  
G. Eckhardt ◽  
S.A. Kokorowski ◽  
G.L. Olson ◽  
A. Gupta ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Ohmic Contacts ◽  
Laser Annealing ◽  
Semiconductor Device ◽  
Furnace Annealing ◽  
Device Structures ◽  
Potential Applications ◽  
General Aspects ◽  
Temperature Heating ◽  
Special Time

ABSTRACTLaser annealing is discussed in the context of potential applications in the fabrication of advanced solid state components and integrated circuits. General aspects of the uniquetemporal and spatial heating distributions that can be obtained with laser heating are presented, and selected examples are given which illustrate the advantage of special time/temperature heating cycles in the processing of specific semiconductor device structures. The performance of silicon and Hgcdte diodes, polysilicon resistors, multiple stacked polysilicon/oxide capacitors, Al/Si ohmic contacts and MOS/SOS transistors fabricated using laser annealing is significantly improved relative to devices fabricatedusing conventional furnace annealing.

Tem analysis of multiple-energy arsenic implanted and Rta'd silicon

1987 ◽  
Vol 45 ◽  
pp. 246-247
Author(s):  
R.A. Herring
Keyword(s):  
Device Fabrication ◽  
High Concentration ◽  
Tem Analysis ◽  
Defect Clusters ◽  
High Fluences ◽  
Small Defect ◽  
Before And After ◽  
The Matrix ◽  
The Difference ◽  
Factor Type

Rapid thermal annealing (RTA) of ion-implanted Si is important for device fabrication. The defect structures of 2.5, 4.0, and 6.0 MeV As-implanted silicon irradiated to fluences of 2E14, 4E14, and 6E14, respectively, have been analyzed by electron diffraction both before and after RTA at 1100°C for 10 seconds. At such high fluences and energies the implanted As ions change the Si from crystalline to amorphous. Three distinct amorphous regions emerge due to the three implantation energies used (Fig. 1). The amorphous regions are separated from each other by crystalline Si (marked L1, L2, and L3 in Fig. 1) which contains a high concentration of small defect clusters. The small defect clusters were similar to what had been determined earlier as being amorphous zones since their contrast was principally of the structure-factor type that arises due to the difference in extinction distance between the matrix and damage regions.

TEM Sample Preparation by Single-Sided Low-Energy Ion Beam Etching

2011 ◽  
Author(s):  
Liew Kaeng Nan ◽  
Lee Meng Lung
Keyword(s):  
Sample Preparation ◽  
Semiconductor Device ◽  
Ion Beam ◽  
Critical Dimension ◽  
Low Energy ◽  
Ex Situ ◽  
Good Image Quality ◽  
Ion Beam Etching ◽  
Device Structures ◽  
Common Technique

Abstract Conventional FIB ex-situ lift-out is the most common technique for TEM sample preparation. However, the scaling of semiconductor device structures poses great challenge to the method since the critical dimension of device becomes smaller than normal TEM sample thickness. In this paper, a technique combining 30 keV FIB milling and 3 keV ion beam etching is introduced to prepare the TEM specimen. It can be used by existing FIBs that are not equipped with low-energy ion beam. By this method, the overlapping pattern can be eliminated while maintaining good image quality.

Effects of Backside Circuit Edit on Transistor Characteristics

2007 ◽  
Author(s):  
R.K. Jain ◽  
T. Malik ◽  
T.R. Lundquist ◽  
Q.S. Wang ◽  
R. Schlangen ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Flip Chip ◽  
Intrinsic Parameters ◽  
Chip Type ◽  
Device Structures ◽  
Before And After ◽  
Silicon Device ◽  
Metal Layers

Abstract Backside circuit edit techniques on integrated circuits (ICs) are becoming common due to increase number of metal layers and flip chip type packaging. However, a thorough study of the effects of these modifications has not been published. This in spite of the fact that the IC engineers have sometimes wondered about the effects of backside circuit edit on IC behavior. The IC industry was well aware that modifications can lead to an alteration of the intrinsic behavior of a circuit after a FIB edit [1]. However, because alterations can be controlled [2], they have not stopped the IC industry from using the FIB to successfully reconfigure ICs to produce working “silicon” to prove design and mask changes. Reliability of silicon device structures, transistors and diodes, are investigated by monitoring intrinsic parameters before and after various steps of modification.

Irradiation Induced Changes in Semiconducting Thin Films

2013 ◽  
Vol 341 ◽  
pp. 181-210 ◽  
Author(s):  
S.K. Tripathi
Keyword(s):  
Thin Films ◽  
Solar Cells ◽  
Heavy Ions ◽  
Semiconductor Device ◽  
High Energy ◽  
Device Fabrication ◽  
Electrical Performance ◽  
Radiation Environment ◽  
Extended Defects ◽  
Semiconducting Thin Films

High-energy electron, proton, neutron, photon and ion irradiation of semiconductor diodes and solar cells has long been a topic of considerable interest in the field of semiconductor device fabrication. The inevitable damage production during the process of irradiation is used to study and engineer the defects in semiconductors. In a strong radiation environment in space, the electrical performance of solar cells is degraded due to direct exposure to energetically charged particles. A considerable amount of work has been reported on the study of radiation damage in various solar cell materials and devices in the recent past. In most cases, high-energy heavy ions damage the material by producing a large amount of extended defects, but high-energy light ions are suitable for producing and modifying the intrinsic point defects. The defects can play a variety of electronically active roles that affect the electrical, structural and optical properties of a semiconductor. This review article aims to present an overview of the advancement of research in the modification of glassy semiconducting thin films using different types of radiations (light, proton and swift heavy ions). The work which has been done in our laboratory related to irradiation induced effects in semiconducting thin films will also be compared with the existing literature.

Non-Destructive Measurements of III-V Semiconductor Device Structure by a Hard X-ray Microprobe

1991 ◽  
Vol 240 ◽  
Author(s):  
F. Uchida ◽  
J. Shigeta ◽  
Y. SUZUKI
Keyword(s):  
Semiconductor Device ◽  
Film Structure ◽  
Device Structure ◽  
X Ray ◽  
Model Sample ◽  
Device Structures ◽  
The Difference ◽  
X Ray Absorption ◽  
Non Destructive ◽  
Non Destructive Characterization

ABSTRACTA non-destructive characterization technique featuring a hard X-ray Microprobe is demonstrated for lll-V semiconductor device structures. A GaAs FET with a 2 μm gate length is measured as a model sample of a thin film structure. X-ray scanning microscopic images of the FET are obtained by diffracted X-ray and fluorescence X-ray detection. Diffracted X-ray detection measures the difference in gate material and source or drain material as a gray level difference on the image due to the X-ray absorption ratio. Ni Ka fluorescence detection, on the other hand, provides imaging of 500 Å thick Ni layers, which are contained only in the source and drain metals, through non-destructive observation.

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