Influence of the off-state gate-source voltage on the transient drain current response of SiC MOSFETs

2018 ◽  
Author(s):  
Christian Unger ◽  
Martin Pfost
Keyword(s):  
Drain Current ◽  
Current Response ◽  
Source Voltage

scholarly journals Equivalent Circuit Modeling of a Dual-Gate Graphene FET

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 63
Author(s):  
Saima Hasan ◽  
Abbas Z. Kouzani ◽  
M A Parvez Mahmud
Keyword(s):  
Equivalent Circuit ◽  
Gate Voltage ◽  
Voltage Dependence ◽  
Drain Current ◽  
Bilayer Graphene ◽  
Circuit Modeling ◽  
Equivalent Circuit Modeling ◽  
Dual Gate ◽  
Source Voltage ◽  
Transit Frequency

This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.

Evaluation of 4H–SiC DMOSFETs for High–Power Electronics Applications

2008 ◽  
Vol 600-603 ◽  
pp. 1135-1138 ◽  
Author(s):  
Ronald Green ◽  
Aderinto Ogunniyi ◽  
Dimeji Ibitayo ◽  
Gail Koebke ◽  
Mark Morgenstern ◽  
...  
Keyword(s):  
High Voltage ◽  
Voltage Drop ◽  
Drain Current ◽  
High Temperature Stress ◽  
Large Area ◽  
Inductive Load ◽  
Current Sharing ◽  
Load Tests ◽  
Source Voltage ◽  
Increasing Temperature

In this paper, large area (0.18cm2) SiC DMOSFETs with 1.2 kV and 20 A rating are evaluated for power electronic switching applications. A drain-to-source voltage drop VDS of 2 V at a forward drain current of 20 A (JD = 110 A/cm2) was obtained and a specific on-resistance of 18 mΩ-cm2 was extracted at room temperature. The device on-resistance was measured up to 150°C and initially decreases with increasing temperature, but remains relatively flat over the entire temperature range, demonstrating stable device behavior. High voltage blocking of 1.2 kV between 25°C and 150°C is also demonstrated with a gate-to-source voltage VGS = 0 V. The drain leakage current under reverse bias and high temperature stress is shown to increase from 10 μA at 25°C to 27 μA at 150°C while maintaining the full blocking rating of the device. Experimental results from double-pulse clamped inductive load tests are presented demonstrating fast high voltage and high current switching capability. High voltage resistive-switching measurements on parallel connected SiC DMOSFETs were performed with VDS having rise and fall times of 49 and 74 ns respectively. Thermal camera images taken of parallel connected DMOSFET die during repetitive switching operation with VDS = 420 V, IDS = 25 A and a 40% duty cycle shows a 2°C difference in die temperature, which suggests even current sharing and temperature stable device operation.

Improving Stability of Pentacene Field-Effect Transistors with Post-Annealing

2007 ◽  
Vol 1029 ◽  
Author(s):  
Shun-Wei Liu ◽  
Jia-Cing Huang ◽  
Chih-Chien Lee ◽  
Chin-Ti Lee ◽  
Juen-Kai Wang
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Annealing Treatment ◽  
Drain Current ◽  
Semiconductor Layer ◽  
Post Annealing ◽  
Source Voltage ◽  
Effect Transistor ◽  
Improved Performance ◽  
Contact Field

AbstractIn this report, we demonstrate that the performance and stability of pentacene top-contact field-effect transistor can be greatly improved with post-annealing treatment. After post-annealing at 90°C for 12 hours in nitrogen environment, the hole field-effect mobility of 0.3 cm2/Vs and the on/off current ratio of 107 were achieved, demonstrating 100% improvement in performance after the post-annealing treatment. The decay rate of drain current at constant gate and drain-source voltage was found to be decreased by more than 40%. The improved performance is attributed to the elimination of trapped holes and lattice defects in the organic semiconductor layer due to the post-annealing process.

P-channel Polycrystalline Silicon Thin Film Transistors on Steel Foil Substrates

2001 ◽  
Vol 664 ◽  
Author(s):  
Ming Wu ◽  
Sigurd Wagner
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
Drain Current ◽  
Silicon Thin Film ◽  
Polysilicon Films ◽  
Source Voltage ◽  
Steel Substrates ◽  
Hydrogenated Amorphous

ABSTRACTWe fabricated self-aligned polycrystalline silicon (polysilicon) thin film transistors on flexible steel substrates. The polysilicon was formed by furnace crystallization of hydrogenated amorphous silicon at 950°C/20sec or 750°C/2min. The TFTs made from these polysilicon films have hole field effect mobilities in the linear regime of 22 cm2·V−1s−1 (950°C) and 14 cm2·V−1s−1 (750°C). The OFF current at 10 V drain-source voltage is 10−10A and the drain current ON/OFF ratio is ∼106.

scholarly journals Nonlinearity Analysis of Quantum Capacitance and its Effect on Nano-Graphene Field Effect Transistor characteristics

2021 ◽  
Author(s):  
MUNINDRA MUNINDRA ◽  
DEVA NAND
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Charge Carrier Concentration ◽  
Single Layer Graphene ◽  
Quantum Capacitance ◽  
Large Area ◽  
Source Voltage ◽  
Current Calculation ◽  
The Impact

Abstract A simple, compact, and fundamental physics-based quasi-analytic model for Single layer graphene field effect transistors (GFETs) with large area graphene is presented in which the quantum mechanical density gradient method is utilised. The basic device physics of the two-dimensional (2D) graphene channel is studied analytically. This modeling leads to the precise drain current calculation of the GFETs. The drain current calculation for GFETs starts from charge carrier concentration, its density of states and quantum capacitance(QC). QC depends on the channel voltage as a function of gate to source voltage Vgs and drain to source voltage Vds primarily. The formulation of the drain current with velocity saturation has been done by the Monte Carlo simulation method. The performance of the analytical GFETs model is present the precise values of QC, its impact on drain current and transfer as well as output characteristics. The impact of QC at nanometer technology adds the nonlinearity to characteristics curves. The proposed method provides better results as compared with the previous analytical and simulated results.

scholarly journals Effect of Temperature and Electrical Modes on Radiation Sensitivity of MISFET Dose Sensors

Proceedings ◽  
2018 ◽  
Vol 2 (13) ◽  
pp. 954 ◽  
Author(s):  
Boris Podlepetsky ◽  
Viacheslav Pershenkov ◽  
Alexander Bakerenkov ◽  
Vladislav Felitsyn ◽  
Alexander Rodin
Keyword(s):  
Experimental Data ◽  
Gate Voltage ◽  
Drain Current ◽  
Radiation Sensitivity ◽  
Effect Of Temperature ◽  
Conversion Function ◽  
Radiation Doses ◽  
Total Ionizing Dose ◽  
Different Temperatures ◽  
Source Voltage

The temperature and electrical modes influences on radiation sensitivity of n-channel MISFETs sensors of the total ionizing dose were investigated. There were measured the MISFET-based dosimeter output voltages V as function of the radiation doses D at const values of the drain current ID and the drain–source voltage VD, as well as the (ID–VG) characteristics before, during and after irradiations at different temperatures T (VG is the gate voltage). It was shown how the conversion function V(D) and the radiation sensitivity SD are depending on the temperature T for different electrical modes. To interpret experimental data there were proposed the models taking into account the separate contributions of charges in the dielectric Qt and in SiO2–Si interface Qs. The model’s parameters ΔVt(D,T) and ΔVs(D,T) were calculated using the experimental ID–VG characteristics. These models can be used to predict performances of MISFET-based devices.

scholarly journals Cryogenic Characterisation and Modelling of Commercial SiC MOSFETs

2017 ◽  
Vol 897 ◽  
pp. 557-560 ◽  
Author(s):  
Lee J. Woodend ◽  
Peter M. Gammon ◽  
Vishal A. Shah ◽  
Amador Pérez-Tomás ◽  
Fan Li ◽  
...  
Keyword(s):  
Temperature Dependence ◽  
Breakdown Voltage ◽  
Threshold Voltage ◽  
Drain Current ◽  
Similar Temperature ◽  
Source Voltage ◽  
Increasing Temperature

Two commercial 1.2 kV SiC MOSFETs have been extensively characterised from 30 to 320 K. The temperature dependence of their I/V characteristics, threshold voltage, and breakdown voltage has been examined and are presented in this paper. Overall, the measured characteristics of both devices demonstrate very similar temperature dependencies and it is shown that below ~100 K any further decrease in temperature has little effect on any of the tested characteristics. Increasing temperature beyond 100 K results in a decrease in drain current for a given drain-source and gate-source voltage, a decrease in threshold voltage, and an increase in breakdown voltage. Successful attempts have been made to model the results of these tests by applying theories found in the literature.

Correlation of Drain Current Pulsed Response with Microwave Power Output in AlGaN/GaN HEMTs

1999 ◽  
Vol 572 ◽  
Author(s):  
S. C. Binari ◽  
K. Ikossi-Anastasiou ◽  
W. Kruppa ◽  
H. B. Dietrich ◽  
G. Kelner ◽  
...  
Keyword(s):  
Power Output ◽  
Microwave Power ◽  
Drain Current ◽  
Current Response ◽  
Small Signal ◽  
Power Performance ◽  
Device Structure ◽  
Gan Hemt ◽  
Signal Characteristics ◽  
Power Densities

ABSTRACTThe drain-current response to short (<1μs) gate pulses has been measured for a series of GaN HEMT wafers that have similar dc and small-signal characteristics. This response has been found to correlate well with the measured microwave power output. For example, for devices where the pulsed drain current is greater than 70% of the dc value, output power densities of up to 2.3 W/mm are attained. This is in contrast with 0.5 W/mm measured for devices with low pulse response (less than 20% of the dc value). These results, which can be explained by the presence of traps in the device structure, provide a convenient test which is predictive of power performance.

Drain Current Response to Fast Illumination Pulse for Amorphous In–Ga–Zn-O Thin-Film Transistors

2016 ◽  
Vol 63 (12) ◽  
pp. 4782-4787 ◽  
Author(s):  
Ya-Hsiang Tai ◽  
Chun-Yi Chang ◽  
Po-Chun Chan ◽  
Jhih-Jie Dai
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Drain Current ◽  
Current Response

Steady and Transient Properties of Side-Gated Nano-Transistors

2013 ◽  
Vol 475-476 ◽  
pp. 1363-1367
Author(s):  
Kun Yuan Xu ◽  
Z.N. Wang ◽  
Y. N. Wang
Keyword(s):  
Monte Carlo ◽  
Steady State ◽  
Drain Current ◽  
Transient Processes ◽  
Current Response ◽  
Double Gate ◽  
Two Dimensional ◽  
Ensemble Monte Carlo ◽  
Current Oscillations ◽  
Simulation Results

Using a two-dimensional ensemble Monte Carlo (EMC) method, the steady and transient properties of side-gated nanotransistors with single gate and double gate are studied in detail. Simulation results show that the double-gated nanotransistor has more powerful controlling ability on the channel than the single-gated one. The transient processes of the drain current for the two devices are both about 3 ps, which imply that the working speed of the two devices may reach about 0.3 THz. The detail of transient processes for the double-gated nanotransistor is trivial. But for the single-gated nanotransistor, the drain current response shows obviously oscillating during approaching the next steady state. The phenomenon of drain current oscillations is also discussed.

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