scholarly journals High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology

2018 ◽  
Vol 24 (6) ◽  
pp. 1-9 ◽  
Author(s):  
Myung-Jae Lee ◽  
Augusto Ronchini Ximenes ◽  
Preethi Padmanabhan ◽  
Tzu-Jui Wang ◽  
Kuo-Chin Huang ◽  
...  
Keyword(s):  
High Performance ◽  
Single Photon ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Avalanche Diode ◽  
Back Illuminated

Scaling trends of single-photon avalanche diode arrays in nanometer CMOS technology

2011 ◽  
Author(s):  
Justin A. Richardson ◽  
Eric A. G. Webster ◽  
Lindsay A. Grant ◽  
Robert K. Henderson
Keyword(s):  
Single Photon ◽  
Cmos Technology ◽  
Avalanche Diode ◽  
Nanometer Cmos

scholarly journals Growth of high-quality semiconducting tellurium films for high-performance p-channel field-effect transistors with wafer-scale uniformity

2022 ◽  
Vol 6 (1) ◽  
Author(s):  
Taikyu Kim ◽  
Cheol Hee Choi ◽  
Pilgyu Byeon ◽  
Miso Lee ◽  
Aeran Song ◽  
...  
Keyword(s):  
Field Effect ◽  
Physical Vapor Deposition ◽  
High Performance ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Wafer Scale

AbstractAchieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm2 V−1 s−1 and an ION/OFF ratio of 5.8 × 105 with 4-inch wafer-scale integrity on a SiO2/Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

A low dark count rate single photon avalanche diode with standard 180 nm CMOS technology

2019 ◽  
Vol 33 (09) ◽  
pp. 1950099
Author(s):  
Wei Wang ◽  
Guang Wang ◽  
Hongan Zeng ◽  
Yuanyao Zhao ◽  
U-Fat Chio ◽  
...  
Keyword(s):  
Count Rate ◽  
Detection Efficiency ◽  
Single Photon ◽  
Cmos Technology ◽  
Uniform Electric Field ◽  
Avalanche Breakdown ◽  
Guard Ring ◽  
Dark Count ◽  
Avalanche Diode ◽  
Dark Count Rate

A single photon avalanche diode (SPAD) structure designed with standard 180 nm CMOS technology is investigated in detail. The SPAD employs a [Formula: see text]-well anode, rather than the conventional [Formula: see text] layer, and with a [Formula: see text]-well/deep [Formula: see text]-well junction with square shape, a deep retrograde [Formula: see text]-well virtual guard ring which prevents the premature edge avalanche breakdown. The analytical and simulation results show that the SPAD exhibits a uniform electric field distribution in [Formula: see text]-well/deep [Formula: see text]-well junction with the active area of [Formula: see text], and the avalanche breakdown voltage is as low as 9 V, the peak of the photon detection efficiency (PDE) is about 33% at 500 nm, the relatively low dark count rate (DCR) of 0.66 KHz at room temperature is obtained.

scholarly journals High performance planar germanium-on-silicon single-photon avalanche diode detectors

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Peter Vines ◽  
Kateryna Kuzmenko ◽  
Jarosław Kirdoda ◽  
Derek C. S. Dumas ◽  
Muhammad M. Mirza ◽  
...  
Keyword(s):  
High Performance ◽  
Single Photon ◽  
Avalanche Diode
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