Design and simulation of steep-slope silicon-on-insulator FETs using negative capacitance: Impact of buried oxide thickness and remnant polarization
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1995 ◽
Vol 38
(2)
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pp. 297-304
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2012 ◽
Vol 7
(2)
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pp. 113-120
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2019 ◽
Vol 19
(10)
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pp. 6128-6130
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1997 ◽
Vol 36
(Part 1, No. 6A)
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pp. 3438-3442
1994 ◽
Vol 52
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pp. 860-861
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