DC gain loss model and optimal choice of switching frequency and turns ratio for high gain, high power, phase modulated resonant transition converters

Author(s):  
Niraja Swaminathan ◽  
N Lakshminarasamma
Energies ◽  
2021 ◽  
Vol 14 (4) ◽  
pp. 800
Author(s):  
David Marroqui ◽  
Ausias Garrigós ◽  
Cristian Torres ◽  
Carlos Orts ◽  
Jose M. Blanes ◽  
...  

Many applications (electric vehicles, renewable energies, low-voltage DC grids) require simple, high-power density and low-current ripple-boost converters. Traditional step-up converters are limited when large transformation ratios are involved. In this work is proposed a step-up converter that brings together the characteristics of high gain, low ripple, and high-power density. From the converter proposal, a mathematical analysis of its operation is first performed, including its static transfer function, stress of components, and voltage and current ripples. Furthermore, it provides a design example for an application of Vin = 48 V to Vo = 270 V and 500 W. For its implementation, two different wide bandgap (WBG) semiconductor models have been used, hybrid GaN cascodes and SiC MOSFETs. Finally, the experimental results of the produced prototypes are shown, and the results are discussed.


2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Eric Audouard ◽  
Guillaume Bonamis ◽  
Clemens Hönninger ◽  
Eric Mottay

Abstract Bursts of GHz repetition rate pulses can significantly improve the ablation efficiency of femtosecond lasers. Depending on the process conditions, thermal mechanisms can be promoted and controlled. GHz ablation therefore combines thermal and non-thermal ablation mechanisms. With an optimal choice of the burst duration, the non-thermal ablation can be highly enhanced by a heating phase due to the first pulses in the burst. The GHz burst mode can be considered as a key function for the “agility” of new high-power lasers.


2019 ◽  
Vol 66 (1) ◽  
pp. 722-728 ◽  
Author(s):  
Zhenbang Liu ◽  
Hua Huang ◽  
Xiao Jin ◽  
Shifeng Li ◽  
Tengfang Wang ◽  
...  

2021 ◽  
Author(s):  
Nagaraja H. Chikkegowda

The space vector PWM (SVPWM) schemes for high power current source drives normally produce low order harmonics due to low switching frequency. To provide a SVPWM with the best harmonic performance, different space vector sequences suitable for a current source rectifier (CSR) are investigated in this project. Details on how to achieve the waveform symmetries with minimum switching frequency for each sequence are discussed. A thorough comparison of the harmonic performance of different space vector sequences based on current source rectifier implementations is carried out. An optimum space vector modulation (SVM) method is proposed to achieve the best line current THD and reduced switching losses. The space vector sequence investigation has been verified in simulation and experimentally using a 10kVA GCT based CSR prototype.


Author(s):  
Priti Gupta ◽  
Sanjay Kumar Jana

This paper deals with the designing of low-power transconductance–capacitance-based loop filter. The folded cascode-based operational transconductance amplifier (OTA) is designed in this paper with the help of quasi-floating bulk MOSFET that achieved the DC gain of 88.61[Formula: see text]dB, unity gain frequency of 97.86[Formula: see text]MHz and power consumption of 430.62[Formula: see text][Formula: see text]W. The proposed OTA is compared with the exiting OTA structure which showed 19.50% increase in DC gain and 15.11% reduction in power consumption. Further, the proposed OTA is used for the designing of transconductance–capacitance-based loop filter that has been operated at [Formula: see text]3[Formula: see text]dB cut-off frequency of 30.12[Formula: see text]MHz with the power consumption of 860.90[Formula: see text][Formula: see text]W at the supply voltage of [Formula: see text][Formula: see text]V. The transistor-level simulation has been done in 0.18[Formula: see text][Formula: see text]m CMOS process.


2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000152-000158
Author(s):  
J. Valle Mayorga ◽  
C. Gutshall ◽  
K. Phan ◽  
I. Escorcia ◽  
H. A. Mantooth ◽  
...  

SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Faster switching and smaller on-state losses coupled with higher voltage blocking and temperature capabilities, make SiC a very attractive semiconductor for high performance, high power density power modules. However, the temperature capabilities and increased power density are fully utilized only when the gate driver is placed next to the SiC devices. This requires the gate driver to successfully operate under these extreme conditions with reduced or no heat sinking requirements, allowing the full realization of a high efficiency, high power density SiC power module. In addition, since SiC devices are usually connected in a half or full bridge configuration, the gate driver should provide electrical isolation between the high and low voltage sections of the driver itself. This paper presents a 225 degrees Celsius operable, Silicon-On-Insulator (SOI) high voltage isolated gate driver IC for SiC devices. The IC was designed and fabricated in a 1 μm, partially depleted, CMOS process. The presented gate driver consists of a primary and a secondary side which are electrically isolated by the use of a transformer. The gate driver IC has been tested at a switching frequency of 200 kHz at 225 degrees Celsius while exhibiting a dv/dt noise immunity of at least 45 kV/μs.


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